SLIDE 1 CENG 342 – Digital Systems
Review Larry Pyeatt
SDSM&T
SLIDE 2
Xilinx Vivado Installation
Start early, it may take hours or days. . . . Download the Vivado Design Suite 2019.2 Web Installer (You will have to create a Xilinx account.) The NEXYS A7 board is used in our class Run the web installer. You will have to enter your Xilinx account credentials. When it gets to the product selection screen, choose Vivado. When it asks you to choose an edition, select Vivado HL Design Edition. On Linux, you probably want to change the install directory from work to opt.
SLIDE 3 Logic Gates
Basic logic gates AND 0 if at least one input is 0 OR 1 if at least one input is 1 NOT 1 if input is 0, 0 if input is 1 NAND NOT+AND: 1 if at least one input is 0 NOR 0 if at least one input is 1 XOR exclusive or: 1 if one and only one input is 1 XOR represents the inequality function (1 if the inputs are not the same otherwise the
Truth table Lists output for each possible input combination: one column for each input variable (for example, A, B and C), and one final column (for example, F) for all possible results
SLIDE 4
Truth Tables
F A B
AND
A B F 1 1 1 1 1
F A B
OR
A B F 1 1 1 1 1 1 1
F A
NOT
A F 1 1
F A B
NAND
A B F 1 1 1 1 1 1 1
F A B
NOR
A B F 1 1 1 1 1
F A B
XOR
A B F 1 1 1 1 1 1
SLIDE 5
Logic Functions
Logical functions can be expressed in several ways:
Truth table Logical expressions Graphical form HDL code
Example:
A B C B BC A + BC
SLIDE 6
Logic Functions
Graphical form:
A B C B BC A + BC
Logical expression: F = A + BC Truth table: A B C F 1 1 1 1 1 1 1 1 1 1 1 1
SLIDE 7
Combinational Logic Circuits
All signals are feed-forward (no feedback paths). Examples:
Adder Subtractor Decoder Multiplexer Priority encoder etc.
ANY combinational logic circuit can be described with a truth table.
SLIDE 8
Sequential Logic Circuits
Outputs depend on external inputs and the present “state” of the circuit. This implies that there are storage elements which store the current state. Examples:
Counter Traffic light controller Sequence detector etc.
ANY sequential logic circuit can be described with a state diagram.