Mixed-Signal VLSI Design Course Code: EE719 Department: Electrical - - PowerPoint PPT Presentation

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Mixed-Signal VLSI Design Course Code: EE719 Department: Electrical - - PowerPoint PPT Presentation

Mixed-Signal VLSI Design Course Code: EE719 Department: Electrical Engineering Lecture 14: February 05, 2018 Instructor Name: M. Shojaei Baghini E-Mail ID: mshojaei@ee.iitb.ac.in 1 2 2 Module 18 Sample & Hold Circuit with Buffer


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Mixed-Signal VLSI Design Course Code: EE719 Department: Electrical Engineering Lecture 14: February 05, 2018

Instructor Name: M. Shojaei Baghini E-Mail ID: mshojaei@ee.iitb.ac.in

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IIT-Bombay Lecture 14 M. Shojaei Baghini

Module 18 Sample & Hold Circuit with Buffer

Reference Chapter: Introduction to Switched capacitor Circuits Design of Analog CMOS Integrated Circuits, by Behzad Razavi Second edition, 2017

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IIT-Bombay Lecture 14 M. Shojaei Baghini

Unity Gain Sampling with Buffer

  • Advantage of op-amp
  • Sensitive to charge injection
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IIT-Bombay Lecture 14 M. Shojaei Baghini

Unity Gain Sample & Hold Circuit with Buffer and Switching at Node X

  • 1. S2 turns off.
  • 2. S1 turns off.
  • 3. S3 turns on.

What about the order for the next phase? How do you compare your answer with the example given in Razavi’s book chapter? Flip Around T&H

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IIT-Bombay Lecture 14 M. Shojaei Baghini

Sample Hold Unity Gain Sample & Hold Circuit with Buffer and Switching at Node X

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IIT-Bombay Lecture 14 M. Shojaei Baghini

Discrete Time Unity Gain Sampler with Switching at Node X

Notice: Insensitive Circuit with Respect to the Injected Charge from S1 and Stray Capacitor at Node X

(I) (III) (II)

  • + -

+ Why is the circuit insensitive to Δq1?

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IIT-Bombay Lecture 14 M. Shojaei Baghini

Differential Architecture: No Differential-mode Charge Injection from S2 to CH Seq turns off slightly after S2 and S2’, and, before S1 and S1’.

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Module 19 Introduction to Discrete Time Amplifiers

Reference Chapter: Introduction to Switched capacitor Circuits Design of Analog CMOS Integrated Circuits, by Behzad Razavi Second edition, 2017

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IIT-Bombay Lecture 14 M. Shojaei Baghini

Discrete Time Amplifier - Introduction

  • Continuous time operation
  • No DC loading
  • No resistive element and hence no RC variation issue.
  • Potential to be converted to a track & hold circuit
  • Advantage of using op-amp?
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Discrete Time Amplifier (Embedded T&H ) with Bottom Plate Switching - Example

S1 and S2 are closed: Sample S3 is closed: Amplify and Hold

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IIT-Bombay Lecture 14 M. Shojaei Baghini

Discrete Time Amplifier (Embedded T&H ) with Bottom Plate Switching – No Effect of Charge Injection from S1

(due to charge injection)

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End of Lecture 14