Mixed-Signal VLSI Design Course Code: EE719 Department: Electrical - - PowerPoint PPT Presentation

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Mixed-Signal VLSI Design Course Code: EE719 Department: Electrical - - PowerPoint PPT Presentation

Mixed-Signal VLSI Design Course Code: EE719 Department: Electrical Engineering Lecture 5: January 15, 2018 Instructor Name: M. Shojaei Baghini E-Mail ID: mshojaei@ee.iitb.ac.in 1 2 2 Module 7 Speed and Accuracy Considerations of Analog


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Mixed-Signal VLSI Design Course Code: EE719 Department: Electrical Engineering Lecture 5: January 15, 2018

Instructor Name: M. Shojaei Baghini E-Mail ID: mshojaei@ee.iitb.ac.in

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IIT-Bombay Lecture 5

  • M. Shojaei Baghini

Module 7 Speed and Accuracy Considerations of Analog Switches

Reference Section: Sampling Switches Chapter: Introduction to Switched-Capacitor Circuits Book: Design of Analog CMOS Integrated Circuits Behzad Razavi, 2017

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IIT-Bombay Lecture 5

  • M. Shojaei Baghini

Quantitative example of charge injection and clock feedthrough is provided in the class notes, which is not included in these slides.

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IIT-Bombay Lecture 5

  • M. Shojaei Baghini

Speed Requirement

  • Speed specification must be accompanied by the

accuracy specification.

  • We use this point in the class to derive maximum

value of 𝜐 as a function of target resolution for the design of the switch.

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IIT-Bombay Lecture 5

  • M. Shojaei Baghini

Figure of Merit (Speed-Accuracy Trade-off)

  • 𝜐 × 𝛩V (due to charge injection): Figure of merit for

speed-accuracy trade off of the sampling switch = 𝜈

$%

  • For scaled technologies with velocity saturation effect

𝛩V × CH / Iswitch ≈ vsat

$

Scaling helps, of course VTH and mobility may dictate a length more than Lmin!

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IIT-Bombay Lecture 5

  • M. Shojaei Baghini

Summary of Charge Injection Effect

  • Derived relation in the class

∆𝑊 = đ›œ đ‘‹đ‘€đ·-. 𝑊

// − 𝑊 12 − 𝑊34

đ·4

  • Error 𝛩V: Gain and offset error
  • VTH includes body effect.
  • Charge injection

cancellation using dummy switch?

  • Will dummy switch avoid

clock feedthrough?

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IIT-Bombay Lecture 5

  • M. Shojaei Baghini

Other Conditions in the Arrangement of Dummy Switches

CP of the order of Ch

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IIT-Bombay Lecture 5

  • M. Shojaei Baghini

Practical Shortcomings of Complementary Switches

  • Enhancement of the input voltage

range and speed improvement

  • Distortion if đ·đ‘šđ‘™ and Clk are not synchronized
  • One possible solution
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IIT-Bombay Lecture 5

  • M. Shojaei Baghini

Charge Injection Cancellation in Simple Complementary Switches

How does complementary switch behave with respect to the charge injection cancellation? (input-dependent behavior)

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IIT-Bombay Lecture 5

  • M. Shojaei Baghini

Differential Sampling

  • Differential sampling reduces (ideally nullifies) the offset

error.

  • Gain error due to differential signal remains.
  • Question: Should we really be concerned about gain

error?

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IIT-Bombay Lecture 5

  • M. Shojaei Baghini

End of Lecture 5