Interconnect Design Sachin S. Sapatnekar University of Minnesota - - PowerPoint PPT Presentation

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Interconnect Design Sachin S. Sapatnekar University of Minnesota - - PowerPoint PPT Presentation

Electromigration-aware Interconnect Design Sachin S. Sapatnekar University of Minnesota Acknowledgments Vivek Mishra (PhD 16), Palkesh Jain (PhD 17) Vidya Chhabria (PhD student) ISPD 2019 University of Minnesota I P D S 2 0 0 2 ISPD


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University of Minnesota ISPD 2019

Electromigration-aware Interconnect Design

Sachin S. Sapatnekar University of Minnesota Acknowledgments Vivek Mishra (PhD 16), Palkesh Jain (PhD 17) Vidya Chhabria (PhD student)

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University of Minnesota ISPD 2019

2

2 2

S D I P

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University of Minnesota ISPD 2019

Outline

  • Overview of electromigration
  • EM modeling
  • The weakest-link model (and why it’s problematic)

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University of Minnesota ISPD 2019

Interconnect aging

  • Electromigration (EM)

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Metal 2 Metal 1 via void Cross-section TEM image [Li, IRPS ’09]

+ −

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University of Minnesota ISPD 2019

Traditional view of EM

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+ I/O drivers +FinFETs,GAAFETs

[Jain, TVLSI June 16]

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University of Minnesota ISPD 2019

Self heating

  • Joule heating in wires
  • Multigate FETs make things worse

– Larger degrees of self-heating, worse paths to the ambient

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Bulk FinFET SOI FinFET GAAFET

[Chhabria, ISQED 19]

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University of Minnesota ISPD 2019

Which interconnects?

  • Power grids

– Largely unidirectional current

  • Signal interconnects

– Bidirectional current flow – Recovery effects seen

Cu Vac e-

Signals

Cell Cell

Power Network Cell-Internal A Y

e-

DC AC

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University of Minnesota ISPD 2019

Outline

  • Overview of electromigration
  • EM modeling
  • The weakest-link model (and why it’s problematic)

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University of Minnesota ISPD 2019

Black’s law

  • Black’s law

– Predicts mean time to failure

  • TTF follows a lognormal distribution

– For a fail fraction FF, defects in parts per million (DPPM) – Constraint on tz → Constraint on t50 → Constraint on jAVG – Joule heating → Constraint on jRMS

  • Circuit-level EM constraint:

– For each wire, stay within jRMS ,max , jAVG,max

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≈ Lognormal

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University of Minnesota ISPD 2019

Physics of mortality and the Blech criterion

Atomic diffusion creates stress gradient that causes Fback-stress 11

Tensile stress at cathode (σ) Compressive stress at anode (–σ)

Blech criterion

At steady state, Felectron wind = Fback-stress

σcritcal: Critical stress needed for void formation If: At steady state, σ < σcritcal then: wire is immortal! (voids never form) σ < σcritcal⟹ 𝑲 × 𝑴 < 𝑳𝟐 (Blech criterion)

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University of Minnesota ISPD 2019

Physics-based EM analysis

  • Korhonen model

– Void nucleation

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Stress at a blocking boundary (cathode) Stress evolution along the wire

𝜖𝜏 𝜖𝑢 = 𝜖 𝜖𝑦 𝜆 Fback−stress + Felectron wind

[Korhonen, JAP 1993]

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University of Minnesota ISPD 2019

EM mortality: Issues with classical approach

Blech criterion if: J × L < K1 Wire immortal to EM else: wire is potentially mortal Black’s equation For potential mortal wires: TTF = K2 J n 𝐟𝐲𝐪 K3 T J : Current density L : Wire length K1 : Constant

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Empirical model, issues for Cu Steady state approach for mortality

[Lloyd, MER ’07]

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EM mortality: Classical vs. filtering approach

Blech criterion if: J × L < K1 Wire immortal to EM else: wire is potentially mortal Black’s equation For potential mortal wires: TTF = K2 J n 𝐟𝐲𝐪 K3 T Filtering approach Transient state approach for mortality Physics-based, applicable for Cu

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Empirical model, issues for Cu Steady state approach for mortality

[Lloyd, MR ’07]

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University of Minnesota ISPD 2019

EM mortality: Mechanical stress evolution

Atomic diffusion creates stress gradient that causes Fback-stress

Tensile stress at cathode (σ) Compressive stress at anode (–σ)

Blech criterion presumes steady state between Felectron wind and Fback-stress

σcritical σsteady state 𝝉 < 𝝉critical

throughout the lifetime. EM-safe! Potentially mortal by Blech criterion

tlifetime 𝝉(tlifetime)

1. Practical EM mortality: relative to the product lifetime 2. Transient stress evolution instead of steady state

Stress (σ) at cathode (MPa) Time (years)

Cu atoms

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University of Minnesota ISPD 2019

EM mortality: Modeling transient stress

  • Blech criterion assumes

𝝐𝝉 𝝐𝒖 = 𝟏

Stress at cathode, 𝝉(t), 2 options: 1. Semi-infinite (SI): 2. Finite (F): 𝝐𝝉 𝝐𝒖 = 𝝐 𝝐𝒚 𝝀 Fback−stress + Felectron wind 𝝉(t) = 𝑲 𝑴 𝜷𝟑 𝟐 𝟑 − ෍

𝒐=𝟏 ∞

𝒇 𝒏𝒐𝟑

−𝒏n

𝟑 𝒖 𝜷𝟒

𝑴𝟑

EM equation Efficient, but overestimates stress Inefficient, but accurate prediction

Wire length, L 16

𝝉(t) = 𝜷𝟐𝑲 𝒖

L=75µm

Extension to interconnect trees using [Park, IRPS10]

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University of Minnesota ISPD 2019

Sequential mortal wire filtration

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Sequential mortal wire filtration

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M1 ⊃ M2 ⊃ M3

𝝉(t) = 𝜷𝟐𝑲 𝒖

𝝉(t) = 𝑲 𝑴 𝜷𝟑 𝟐 𝟑 − ෍

𝒐=𝟏 ∞

𝒇 𝒏𝒐𝟑

−𝒏n

𝟑 𝒖 𝜷𝟒

𝑴𝟑

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University of Minnesota ISPD 2019

Potential Mortal wires from the Blech criterion

IBMPG case study: PG2 mortal wire distribution

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0.2 0.4 0.6 0.8 1 1.2 20 40 60 80 Current density (MA/cm2) Length (µm) Mortal wires Blech criterion Potential mortal wires

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Immortal wires filtered out using pessimistic Filter 2 (SI)

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0.2 0.4 0.6 0.8 1 1.2 20 40 60 80 Current density (MA/cm2) Length (µm) Mortal wires Filter 2 (SI) Blech criterion Potential mortal wires

𝑲𝑻𝑱

𝑛𝑏𝑦

Product lifetime = 10 years Temperature (T) = 105C

IBMPG case study: PG2 mortal wire distribution

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University of Minnesota ISPD 2019

Immortal wires filtered out using pessimistic Filter 2 (SI) & accurate Filter 3 (F)

IBMPG case study: PG2 mortal wire distribution

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0.2 0.4 0.6 0.8 1 1.2 20 40 60 80 Current density (MA/cm2) Length (µm) Mortal wires Filter 2 (SI) Filter 3 (F) Blech criterion

Product lifetime = 10 years Temperature (T) = 105C 𝑲𝑻𝑱

𝑛𝑏𝑦

Actual mortal wires

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What about lines with branches? Vias?

  • Flux Divergence

– Current flow in neighboring wire affects EM flux – Use effective current for EM

  • The above is approximate

– There’s a physics-based version for this too

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2J J JEM (Y) = 2J + J X Y Ta barrier

[Park, IRPS10]

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Outline

  • Overview of electromigration
  • EM modeling
  • The weakest-link model (and why it’s problematic)

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Circuit impact

  • Conventional way to overcome EM

– Constraint on tz → Constraint on t50 → Constraint on jAVG – Joule heating → Constraint on jRMS

  • Circuit-level EM constraint:

– For each wire, stay within jRMS ,max , jAVG,max

  • Weakest-link model

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Handling catastrophic errors

  • A simple analysis of an n-component system

– Fi = probability of failure of the ith component – 1 – Fi = probability that the ith component works – n = number of components in the system – (1 – Fi)n = probability that all n components work – Probability of system failure = 1 – (1 – Fi)n

  • Implicit assumptions

– All failures are catastrophic – All failures are equally serious – All failures are independent

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University of Minnesota ISPD 2019

Interconnect redundancy

  • Several on-chip interconnect systems are built to be redundant

Power grids Clock grids

  • A system fails when it’s key parameters fail – and NOT at first failure!
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Electromigration in power grids

  • Power grids are built to contain redundancies!
  • 8

1 2 2

  • 3

6

  • 13

Worst ∆V(mV) ∆R/R = 50%

A better failure criterion:

[Mishra, DAC13]

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Analyzing redundancy

  • Two component system: one of

the two fails first

[Jain, IRPS15]

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Analyzing redundancy

  • Two-component system: one of

the two fails first

  • Post-failure: current goes

through intact component

[Jain, IRPS15]

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Fail Fraction TTF

Reliability under changing stress

Two parallel leads –𝐺

1(𝑢)

A single lead – 𝐺2(𝑢)

Shifted CDF: 𝐺

2(𝑢 −

𝜀1) System CDF

[Jain, IRPS15]

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University of Minnesota ISPD 2019

Fail Fraction TTF

Reliability under changing stress

CDF: 𝐺

1(𝑢)

Unshifted CDF: 𝐺2(𝑢)

Shifted CDF: 𝐺

2(𝑢 −

𝜀1) System CDF

[Jain, IRPS15]

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Fail Fraction TTF

Reliability under changing stress

CDF: 𝐺

1(𝑢)

Unshifted CDF: 𝐺2(𝑢) Shifted CDF: 𝐺2(𝑢 − 𝜀1) System CDF

[Jain, IRPS15]

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System impact for a clock grid

Circuit Delay time

Y A Vss

Vdd

[Jain, IRPS15]

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System impact for a clock grid

Circuit Delay

Y A Vss

Vdd R1 R1 fails

time

[Jain, IRPS15]

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System impact for a clock grid

Circuit Delay

Y A Vss

Vdd R1 R2 R1 fails R2 fails

time

[Jain, IRPS15]

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System impact for a clock grid

Circuit Delay

Y A Vss

Vdd R1 R2 R3 R1 fails R2 fails R3 fails

time

[Jain, IRPS15]

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Quantitative evaluation

0.1 FF criteria WLA TTF This approach time (a. u.) FF

[Jain, IRPS15]

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EM and stress

  • Blech effect

– Back stress opposes electron wind – Some wires are “immortal” due to back-stress

(jL) < (jL)critical → “immortal wire”

  • Other sources of stress – thermomechanical stress

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+ −

e- flow time=0 time>>0

FEM µ J

Typical Cu interconnect

[Mishra, DAC16]

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University of Minnesota ISPD 2019

Thermomechanical stress in power grid

  • Caused by thermal expansion mismatch between various layers of

the interconnect system

  • Evaluate using Finite Element Method (FEM)
  • FEM: Numerical, computationally expensive

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Various layers in typical copper interconnect

[Mishra, DAC16]

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Stress analysis of power grid vias (contd.)

Thermal stress for every via can vary depending on:

– Position of the via array in the power grid – Position of the via in the via array – Via array configuration (e.g., 4x4, 8x8 via array)

40 160 210 260 1 2

Hydrostatic stress (MPa)

x (µm) T-shaped Plus-shaped L-shaped

Plus-shaped, T-shaped, and L- shaped 4x4 via array

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Stress analysis of power grid vias (contd.)

Thermal stress for every via can vary depending on:

– Position of the via array in the power grid – Position of the via in the via array – Via array configuration (e.g., 4x4, 8x8 via array)

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Three configurations with the same area

180 200 220 240 260 280 1 2

Hydrostatic Stress (MPa)

x (µm) 8x8 4x4 1x1

1x1 4x4 8x8

30MPa stress difference = ~30% change in lifetime

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University of Minnesota ISPD 2019

Via array performance and redundancy

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Cumulative percentile Time to failure (TTF) (years)

Via arrays with same resistance

0.25 0.5 0.75 1 8 10 12 14 4x4 via 2x2 via

4x4 via 2x2 via More vias Better for TTF When does the via array fail?

[Mishra, DAC16]

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IMBPG1: TTF for various failure criteria

Failure criteria for:

1. System (power grid) failure

  • Weakest-link: Conventional

method, implies 1st failure

  • Our criterion: 10% IR-drop

2. Sub-system (via array) failure

  • Weakest-link: 1st via failure
  • Our criterion: 8th via failure

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[Mishra, DAC16]

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Conclusion

  • EM is an important problem for current/future

technologies

  • Critical issue in high-current density scenarios

– Lower metal levels – Analog blocks – Potential within-cell issues – Higher on-chip temperatures exacerbate the challenge

  • Leveraging redundancy for EM mitigation is essential

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University of Minnesota ISPD 2019

Thank you!

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Backup

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”AC EM”

Bidirectional pulsed current

  • Mathematical average = 0
  • Electromigration point of

view, failures are seen, but at much higher lifetime

  • Define a new ‘recovered’

current criteria:

3