ECED2200 – Digital Circuits Serial Protocols, Registers, Shift Registers 23/07/2012 Colin O’Flynn - CC BY-SA 1
General Notes See updates to these slides: www.newae.com/teaching • These slides licensed under ‘Creative Commons Attribution-ShareAlike 3.0 • Unported License’ These slides are not the complete course – they are extended in-class • You will find the following references useful, see • www.newae.com/teaching for more information/links: The book “Bebop to the Boolean Boogie” which is available to Dalhousie Students – Course notes (covers almost everything we will discuss in class) – Various websites such as e.g.: www.play-hookey.com – The book “Contemporary Logic Design”, which was used in previous iterations of the – class and you may have already 23/07/2012 Colin O’Flynn - CC BY-SA 2
REGISTERS 23/07/2012 Colin O’Flynn - CC BY-SA 3
23/07/2012 Colin O’Flynn - CC BY-SA 4
Registers 23/07/2012 Colin O’Flynn - CC BY-SA 5
SHIFT REGISTERS 23/07/2012 Colin O’Flynn - CC BY-SA 6
Serial to Parallel Shift Register 23/07/2012 Colin O’Flynn - CC BY-SA 7
Serial to Parallel Shift Register 23/07/2012 Colin O’Flynn - CC BY-SA 8
Serial to Parallel Shift Register 23/07/2012 Colin O’Flynn - CC BY-SA 9
Serial to Parallel Shift Register 23/07/2012 Colin O’Flynn - CC BY-SA 10
SERIAL PROTOCOLS 23/07/2012 Colin O’Flynn - CC BY-SA 11
General Characteristics of Serial • Bit Rate • MSB/LSB First • Length of data • Control Lines 23/07/2012 Colin O’Flynn - CC BY-SA 12
Serial Peripheral Interface (SPI) • Four lines: – Data In – Data Out – Clock – Slave Select 23/07/2012 Colin O’Flynn - CC BY-SA 13
SPI Images by Colin M.L. Burnett published under CC BY-SA License 23/07/2012 Colin O’Flynn - CC BY-SA 14
SPI Images by Colin M.L. Burnett published under CC BY-SA License 23/07/2012 Colin O’Flynn - CC BY-SA 15
SPI SCK SS Images by Colin M.L. Burnett published under CC BY-SA License 23/07/2012 Colin O’Flynn - CC BY-SA 16
Inter-IC (I 2 C) • Two lines: – Clock – Bidirectional Data 23/07/2012 Colin O’Flynn - CC BY-SA 17
I 2 C Images by Colin M.L. Burnett published under CC BY-SA License 23/07/2012 Colin O’Flynn - CC BY-SA 18
Inter-IC (I 2 C) Images by Marcin Florvan released into public domain 23/07/2012 Colin O’Flynn - CC BY-SA 19
Asynchronous Serial • Two lines typically: – Data In – Data Out 23/07/2012 Colin O’Flynn - CC BY-SA 20
Asynchronous Serial 23/07/2012 Colin O’Flynn - CC BY-SA 21
Universal Serial Bus (USB) • Two Lines – D+, D- = Both Data Lines 23/07/2012 Colin O’Flynn - CC BY-SA 22
Summary • ECED Class Notes • Bebop to the Boolean Boogie 23/07/2012 Colin O’Flynn - CC BY-SA 23
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