ECED2200 Digital Circuits Counters 24/07/2012 Colin OFlynn - CC - - PowerPoint PPT Presentation

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ECED2200 Digital Circuits Counters 24/07/2012 Colin OFlynn - CC - - PowerPoint PPT Presentation

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ECED2200 Digital Circuits Counters 24/07/2012 Colin OFlynn - CC BY-SA 1 General Notes See updates to these slides: www.newae.com/teaching These slides licensed under Creative Commons Attribution-ShareAlike 3.0 Unported

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SLIDE 1

ECED2200 – Digital Circuits

Counters

24/07/2012 Colin O’Flynn - CC BY-SA 1

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SLIDE 2

General Notes

  • See updates to these slides: www.newae.com/teaching
  • These slides licensed under ‘Creative Commons Attribution-ShareAlike 3.0

Unported License’

  • These slides are not the complete course – they are extended in-class
  • You will find the following references useful, see

www.newae.com/teaching for more information/links:

– The book “Bebop to the Boolean Boogie” which is available to Dalhousie Students – Course notes (covers almost everything we will discuss in class) – Various websites such as e.g.: www.play-hookey.com – The book “Contemporary Logic Design”, which was used in previous iterations of the class and you may have already

24/07/2012 Colin O’Flynn - CC BY-SA 2

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DIVIDE-BY N COUNTER

24/07/2012 Colin O’Flynn - CC BY-SA 3

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Divide-By N

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CLK CLK/2 CLK/4 CLK/8

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Divide-By N

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CLK CLK/2 CLK/4

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Uses of Divide-By-N

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32.768 KHz crystal

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Uses of Divide-By-N

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32.768 KHz crystal

215 = 32768

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SLIDE 8

BINARY RIPPLE COUNTER

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Binary Ripple Design

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Up Counter

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CLK Q0 Q1 Q3

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Down Counter

24/07/2012 Colin O’Flynn - CC BY-SA 11

CLK Q0 Q1 Q3

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SYNCHRONOUS COUNTER

24/07/2012 Colin O’Flynn - CC BY-SA 12

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SLIDE 13

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Count Sequence?

0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0

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Synchronous Counter Design

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RING COUNTER

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Design

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DESIGN PROCEDURE FOR ARBITRARY COUNTERS

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Design Specs

0 0 0 0 1 0 0 1 1 1 0 1 1 1 0 (0, 2, 3, 5, 6)

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Procedure

  • 1. Draw state transition diagram
  • 2. Write state transition table
  • 3. Choose flip-flops & determine required

inputs

  • 4. Design logic to realize required inputs

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Counter Design Example

0 0 0 0 1 0 0 1 1 1 0 1 1 1 0 (0, 2, 3, 5, 6)

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  • 1. State Transition Diagram

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000 010 011 101 110

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  • 2. State Transition Table

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A B C A+ B+ C+ 1 1 1 1 1 1 1 1 1 1 1 1

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  • 2. State Transition Table

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A B C A+ B+ C+ 1 1 ? ? ? 1 1 1 1 1 1 1 1 ? ? ? 1 1 1 1 1 1 1 1 1 ? ? ?

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  • 3. Select Flip-Flop

e.g.: We will use T flip-flops:

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Q Q+ T 1 1 1 1 1 1

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  • 3. Figure out FF Inputs

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Q Q+ T 1 1 1 1 1 1

A B C A+ B+ C+ TA TB TC 1 1 ? ? ? 1 1 1 1 1 1 1 1 ? ? ? 1 1 1 1 1 1 1 1 1 ? ? ?

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SLIDE 27
  • 3. Figure out FF Inputs

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Q Q+ T 1 1 1 1 1 1

A B C A+ B+ C+ TA TB TC 1 1 1 ? ? ? ? ? ? 1 1 1 1 1 1 1 1 1 1 1 ? ? ? ? ? ? 1 1 1 1 1 1 1 1 1 1 1 1 1 ? ? ? ? ? ?

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  • 4. Generate Required Logic

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A B C TA 1 ? 1 1 1 1 1 ? 1 1 1 1 1 1 1 1 ?

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  • 4. Generate Required Logic

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A B C TB 1 1 ? 1 1 1 1 1 ? 1 1 1 1 1 1 1 1 1 ?

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  • 4. Generate Required Logic

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A B C TC 1 ? 1 1 1 1 1 ? 1 1 1 1 1 1 1 1 ?

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  • 4. Implement

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CLK A B C

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  • 4. Implement

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Verifying if Counters are Self-Starting

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A B C A+ B+ C+ TA TB TC 1 1 1 1 1 1 1 1 1 1 1 1

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State Transition Diagram

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000 010 011 101 110

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More

See class notes for lots of examples of creating counters & verifying if they are self-starting or not

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