Digital Integrated Circuits Chapter 6 The CMOS Inverter EEL7312 - - PowerPoint PPT Presentation

EEL7312 – INE5442 Digital Integrated Circuits 1

Digital Integrated Circuits

Chapter 6 – The CMOS Inverter

EEL7312 – INE5442 Digital Integrated Circuits 2

Contents

Introduction (MOST models) 0, 1st, 2nd order The CMOS inverter : The static behavior:

• DC transfer characteristics,
• Short-circuit current

The CMOS inverter : The dynamic behavior Energy, power, and energy delay

EEL7312 – INE5442 Digital Integrated Circuits 3

Introduction - 1

Zero-order model (ideal switch)

• f n- and p-channel MOSFETs

Inverter

Source: Weste & Harris

What for a signal between “0” and “1”?

EEL7312 – INE5442 Digital Integrated Circuits 4

Introduction - 2

VGS ≥ VT R

• n

S D

Non ideal switch

|VGS|

An MOS Transistor

First-order model of a MOSFET

Source: Rabaey

What’s the value of Ron? Abrupt transition from on to off?

EEL7312 – INE5442 Digital Integrated Circuits 5

Introduction - 3

The MOS Transistor

Polysilicon Aluminum

Source: Rabaey

EEL7312 – INE5442 Digital Integrated Circuits 6

Introduction - 4

MOS Transistors – n- and p-channel

S D G G S D

NMOS Enhancement PMOS Enhancement

D S G B G B

In general connected to GND In general connected to VDD

EEL7312 – INE5442 Digital Integrated Circuits 7

Introduction - 5

I-V Relations Long-channel n-MOST

0.5 1 1.5 2 2.5 1 2 3 4 5 6 x 10

• 4

VDS(V)

ID(A) VGS= 2.5 V VGS= 2.0 V VGS= 1.5 V VGS= 1.0 V Resistive Saturation VDS = VGS - VT VGS< 0.5 V S D G

ID

Source: Rabaey

EEL7312 – INE5442 Digital Integrated Circuits 8

Introduction - 6

I-V Relations Long-channel p-MOST

0.5 1 1.5 2 2.5 1 2 3 4 5 6 x 10

• 4
• VDS(V)

ID(A) VGS=- 2.5 V VGS= -2.0 V VGS= -1.5 V VGS= -1.0 V Resistive Saturation VDS = VGS - VT VGS>- 0.5 V

ID

S D G Source: Rabaey

EEL7312 – INE5442 Digital Integrated Circuits 9

Introduction - 7

Source: Rabaey

EEL7312 – INE5442 Digital Integrated Circuits 10

Introduction - 8

ID versus VGS

0.5 1 1.5 2 2.5 1 2 3 4 5 6x 10

• 4

V

GS(V)

ID (A)

quadratic

Saturation mode: VDS>VGS-VT

VDS=2.5 V VT = 0.5 V

constant

Source: Rabaey

EEL7312 – INE5442 Digital Integrated Circuits 11

Introduction – 9

Experimental setup

ID

S G B +

• [0,3.3] step 0,5 V

+

• [0,3.3] step 0,050 V

D

2 3 1 1

+

VDD = 3.3 V

• +
• VGS

+

• VDS

EEL7312 – INE5442 Digital Integrated Circuits 12

Introduction – 9

Circuit description (SPICE)

http://www.inf.ufsc.br/~santos/ine5442/experi

ment/PMOSa.cir

Steps

http://www.inf.ufsc.br/~santos/ine5442/experi

ment/roteiro.txt

An experiment

EEL7312 – INE5442 Digital Integrated Circuits 13

Introduction – 10

Simulation 6.1a lambda = 0.1

VGS=-3.3 V VGS=-2.3 V VGS=-2.8 V VGS=-1.8 V VGS=-1.3 V

EEL7312 – INE5442 Digital Integrated Circuits 14

Introduction - 12

The Transistor as a Switch VGS ≥ VT

R

• n

S D

( )

1 2

eq mid

R R R ≡ + ( )

2

2

P DSAT DD T

K W I V V L ≡ −

I

D

VDS VGS = VDD VDD/2 VDD R0 Rmid

IDSAT

Source: Rabaey

EEL7312 – INE5442 Digital Integrated Circuits 15

Introduction - 13

CMOS static logic – the beginning

EEL7312 – INE5442 Digital Integrated Circuits 16

Introduction - 14

CMOS static logic – the beginning

EEL7312 – INE5442 Digital Integrated Circuits 17

Introduction - 15

CMOS device structure from Frank Wanlass's patent drawing.

• U. S. Patent Office.

EEL7312 – INE5442 Digital Integrated Circuits 18

Out In VDD PMOS NMOS

Polysilicon In Out VDD GND PMOS 2λ Metal 1 NMOS Contacts N Well Source: Rabaey

Introduction - 16

Schematic and layout -1

EEL7312 – INE5442 Digital Integrated Circuits 19

Introduction - 17

Schematic and layout -2

EEL7312 – INE5442 Digital Integrated Circuits 20

Static characteristics - 1

V

in

V

• ut

CL VDD

VDD Vout OFF ON PMOS ON OFF NMOS VDD Vin

Source: Rabaey

V

DD

V

DD

V

in= V DD

Vin= 0 V

• ut

Vout Rn Rp

DD Tn GSn Tp GSp

V V V V V = > = >

Tn GSn DD Tp GSp

V V V V V = < = − <

EEL7312 – INE5442 Digital Integrated Circuits 21

Static characteristics - 1

V

in

V

• ut

CL VDD

VDD Vout OFF ON PMOS ON OFF NMOS VDD Vin

Source: Rabaey

V

DD

V

DD

V

in= V DD

Vin= 0 V

• ut

Vout Rn Rp

DD Tn GSn Tp GSp

V V V V V = > = >

Tn GSn DD Tp GSp

V V V V V = < = − <

EEL7312 – INE5442 Digital Integrated Circuits 22

Static characteristics - 1

V

in

V

• ut

CL VDD

VDD Vout OFF ON PMOS ON OFF NMOS VDD Vin

Source: Rabaey

V

DD

V

DD

V

in= V DD

Vin= 0 V

• ut

Vout Rn Rp

DD Tn GSn Tp GSp

V V V V V = > = >

Tn GSn DD Tp GSp

V V V V V = < = − <

EEL7312 – INE5442 Digital Integrated Circuits 23

V

in

V

• ut

CL VDD

Source: Rabaey

Voltage swing is equal to the supply voltage; Logic levels are not dependent upon the relative device sizes; In steady state there always exists a path with finite resistance between the output and either VDD or ground; The input resistance →∞; No direct path exists between supply and ground rails under steady-state operating conditions (this is first order approx. and is far from reality in more advanced technologies) → static power ≈ 0

Static characteristics - 2

EEL7312 – INE5442 Digital Integrated Circuits 24

Source: Rabaey

Static characteristics - 3

Vin = VDD+V

GSp

IDn = - IDp Vout = VDD+V

DSp

PMOS Load Line

Vout IDn

Vin Vout CL V

DD

• VGSp

+

• VDSp

+

IDp IDn

VDSp IDp VGSp=-2.5 VGSp=-1 VDSp IDn Vin=0 Vin=1.5 Vin = VDD+V

GSp

IDn = - IDp Vout = VDD+V

DSp

VDD=2.5 V

Vout IDn Vin=0 Vin=1.5 2.5

EEL7312 – INE5442 Digital Integrated Circuits 25

Source: Rabaey

Static characteristics - 4

Vin Vout V

DD

• VGSp

+

• VDSp

+

IDp IDn

IDn V

• ut

V

in= 2.5

2 1.5 V

in= 0

0.5 1 NMOS V

in= 0

V

in= 0.5

V

in= 1

V

in= 1.5

V

in= 2

V

in= 2.5

1 1.5 PMOS

VTC

Vout 0.5 1 1.5 2 2.5 NMOS res PMOS off NMOS sat PMOS sat NMOS off PMOS res NMOS sat PMOS res NMOS res PMOS sat

in

0.5 1 1.5 2 2.5 V