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Digital Integrated Circuits Chapter 6 The CMOS Inverter EEL7312 - PowerPoint PPT Presentation

Digital Integrated Circuits Chapter 6 The CMOS Inverter EEL7312 INE5442 1 Digital Integrated Circuits Contents Introduction (MOST models) 0, 1 st , 2 nd order The CMOS inverter : The static behavior: o DC transfer


  1. Digital Integrated Circuits Chapter 6 – The CMOS Inverter EEL7312 – INE5442 1 Digital Integrated Circuits

  2. Contents � Introduction (MOST models) 0, 1 st , 2 nd order � The CMOS inverter : The static behavior: o DC transfer characteristics, o Short-circuit current � The CMOS inverter : The dynamic behavior � Energy, power, and energy delay EEL7312 – INE5442 2 Digital Integrated Circuits

  3. Introduction - 1 Zero-order model (ideal switch) of n- and p-channel MOSFETs Inverter What for a signal between “0” and “1”? EEL7312 – INE5442 3 Source: Weste & Harris Digital Integrated Circuits

  4. Introduction - 2 First-order model of a MOSFET An MOS Transistor Non ideal switch V GS ≥ V T R |V GS | on S D What’s the value of R on ? Abrupt transition from on to off? Source: Rabaey EEL7312 – INE5442 4 Digital Integrated Circuits

  5. Introduction - 3 The MOS Transistor Polysilicon Aluminum Source: Rabaey EEL7312 – INE5442 5 Digital Integrated Circuits

  6. Introduction - 4 MOS Transistors – n- and p-channel D D G B In general connected to GND G S S NMOS Enhancement D G B G In general connected to V DD S PMOS Enhancement EEL7312 – INE5442 6 Digital Integrated Circuits

  7. Introduction - 5 I-V Relations -4 6 x 10 Long-channel n-MOST VGS= 2.5 V 5 D Resistive Saturation I D 4 VGS= 2.0 V G ID(A) 3 V DS = V GS - V T S 2 VGS= 1.5 V 1 VGS= 1.0 V VGS< 0.5 V 0 0 0.5 1 1.5 2 2.5 VDS(V) Source: Rabaey EEL7312 – INE5442 7 Digital Integrated Circuits

  8. Introduction - 6 I-V Relations -4 6 x 10 Long-channel p-MOST VGS=- 2.5 V 5 Resistive Saturation S 4 VGS= -2.0 V ID(A) G 3 I D V DS = V GS - V T D 2 VGS= -1.5 V 1 VGS= -1.0 V VGS>- 0.5 V 0 0 0.5 1 1.5 2 2.5 -VDS(V) Source: Rabaey EEL7312 – INE5442 8 Digital Integrated Circuits

  9. 9 Digital Integrated Circuits EEL7312 – INE5442 Introduction - 7 Source: Rabaey

  10. Introduction - 8 I D versus V GS -4 6x 10 Saturation mode: V DS >V GS -V T 5 V DS =2.5 V V T = 0.5 V 4 quadratic constant I D (A) 3 2 1 0 0 0.5 1 1.5 2 2.5 V GS (V) Source: Rabaey EEL7312 – INE5442 10 Digital Integrated Circuits

  11. Introduction – 9 Experimental setup S - 1 V GS - + + 2 V DS B G 1 VDD = 3.3 V + + I D - [0,3.3] step 0,5 V D + 3 - [0,3.3] step 0,050 V - EEL7312 – INE5442 11 Digital Integrated Circuits

  12. Introduction – 9 An experiment � Circuit description (SPICE) � http://www.inf.ufsc.br/~santos/ine5442/experi ment/PMOSa.cir � Steps � http://www.inf.ufsc.br/~santos/ine5442/experi ment/roteiro.txt EEL7312 – INE5442 12 Digital Integrated Circuits

  13. Introduction – 10 Simulation 6.1a lambda = 0.1 V GS =-3.3 V V GS =-2.8 V V GS =-2.3 V V GS =-1.8 V V GS =-1.3 V EEL7312 – INE5442 13 Digital Integrated Circuits

  14. Introduction - 12 The Transistor as a Switch I D V GS = V DD V GS ≥ V T I DSAT R mid R on S D R 0 V DS 1 ( ) V DD /2 V DD ≡ + R R R 0 eq mid 2 K W ( ) 2 ≡ − P I V V DSAT DD T 2 L Source: Rabaey EEL7312 – INE5442 14 Digital Integrated Circuits

  15. 15 CMOS static logic – the beginning Digital Integrated Circuits EEL7312 – INE5442 Introduction - 13

  16. Introduction - 14 CMOS static logic – the beginning EEL7312 – INE5442 16 Digital Integrated Circuits

  17. Introduction - 15 CMOS device structure from Frank Wanlass's patent drawing. U. S. Patent Office. EEL7312 – INE5442 17 Digital Integrated Circuits

  18. Introduction - 16 Schematic and layout -1 N Well VDD V DD PMOS 2 λ Contacts PMOS In Out Out In Metal 1 Polysilicon NMOS NMOS GND Source: Rabaey EEL7312 – INE5442 18 Digital Integrated Circuits

  19. Introduction - 17 Schematic and layout -2 EEL7312 – INE5442 19 Digital Integrated Circuits

  20. Static characteristics - 1 V DD V V DD DD R p V V in out V out V out C L R n V in = 0 V in = V DD V in 0 V DD = > = < 0 V V V V V NMOS OFF ON GSn DD Tn GSn Tn = > = − < 0 V V V V V PMOS ON OFF GSp Tp GSp DD Tp V out V DD 0 EEL7312 – INE5442 20 Source: Rabaey Digital Integrated Circuits

  21. Static characteristics - 1 V DD V V DD DD R p V V in out V out V out C L R n V in = 0 V in = V DD V in 0 V DD = > = < 0 V V V V V NMOS OFF ON GSn DD Tn GSn Tn = > = − < 0 V V V V V PMOS ON OFF GSp Tp GSp DD Tp V out V DD 0 EEL7312 – INE5442 21 Source: Rabaey Digital Integrated Circuits

  22. Static characteristics - 1 V DD V V DD DD R p V V in out V out V out C L R n V in = 0 V in = V DD V in 0 V DD = > = < 0 V V V V V NMOS OFF ON GSn DD Tn GSn Tn = > = − < 0 V V V V V PMOS ON OFF GSp Tp GSp DD Tp V out V DD 0 EEL7312 – INE5442 22 Source: Rabaey Digital Integrated Circuits

  23. Static characteristics - 2 V DD Voltage swing is equal to the supply voltage; Logic levels are not dependent upon the relative device sizes; V V In steady state there always exists a path with finite in out resistance between the output and either V DD or C L ground; The input resistance → ∞ ; No direct path exists between supply and ground rails under steady-state operating conditions (this is first order approx. and is far from reality in more advanced technologies) → static power ≈ 0 EEL7312 – INE5442 23 Digital Integrated Circuits Source: Rabaey

  24. Static characteristics - 3 PMOS Load Line V DD I Dn - V GSp - V in = V DD +V GSp + V DSp I Dn = - I Dp + V out = V DD +V DSp V in V out I Dp I Dn V out C L I Dp I Dn I Dn V DD =2.5 V V in =0 V in =0 V in =1.5 V in =1.5 V out 2.5 V DSp V DSp V GSp =-1 V GSp =-2.5 V in = V DD +V V out = V DD +V GSp DSp I Dn = - I Dp EEL7312 – INE5442 24 Digital Integrated Circuits Source: Rabaey

  25. Static characteristics - 4 VTC I Dn in = 2.5 in = 0 V V PMOS V NMOS DD - V GSp 2 0.5 - + V DSp 1.5 1 + V in V out I Dp in = 1.5 V in = 1 V 1.5 1 I Dn in = 2 in = 0.5 V V in = 2.5 in = 0 V V V out V NMOS off out PMOS res 2.5 NMOS sat PMOS res 2 NMOS sat 1.5 PMOS sat 1 NMOS res PMOS sat 0.5 NMOS res PMOS off V 0.5 1 1.5 2 2.5 in EEL7312 – INE5442 25 Digital Integrated Circuits Source: Rabaey

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