Ferroelectric Memory and Negative Capacitance T.P. Ma Yale - - PowerPoint PPT Presentation
Ferroelectric Memory and Negative Capacitance T.P. Ma Yale - - PowerPoint PPT Presentation
Ferroelectric Memory and Negative Capacitance T.P. Ma Yale University Ferroelectrics: The Basics Example: PZT A class of ionic crystals that exhibit spontaneous polarization, switchable by external electric fields Must be below the
- A class of ionic crystals that exhibit spontaneous
polarization, switchable by external electric fields
- Must be below the ‘Curie’ temperature
Ferroelectrics: The Basics
Example: PZT
Ferroelectric Polarization
- - - -
Electrode Electrode + + + +
- - - -
+ + + +
- P
+P df, f ,P(E) V
P-E hysteresis
Ps Pr Ec
P E
0’
The 1T-1C Memory Cell
based on Metal/Ferro/Metal (MFM) capacitor
(the current commercial products)
Word Line Bit Line
Similar to DRAM Cell Structure
MFM capacitor
The Single-Transistor (FeFET) Memory Cell
Similar to Flash Cell Structure
Operating Principle of FeFET
VD ID n+ n+
P
- - - - -
ID ~0 VD n+ n+
P
+ + + + +
Programming: Read out:
(@ Vg=0) ID0 "0" Large ID "1"
+ + + + +
- - - - -
- +
- +
- +
- +
- +
(FE)
- n
"1"
- +
- +
(FE)
- ff
"0"
Id-Vg Hysteresis of FeFET
- 2
- 1
1 2 3 4 1E-5 1E-4 1E-3 0.01 0.1 1 10
Id(uA)
Vg(V)
5
Pt/SBT/Y
2O3/Si
W/L(um)=40/2
Memory Window
The Obstacles that have so far Prevented the Commercialization of FeFET
- Problems with Previously Available
Ferroelectrics (PZT and SBT)
- There are Tremendous Difficulties in
- CMOS Compatibility
- Thermal Budget; Process Integration
- Scaling Below 0.1 µm Node
Representative Memory Window Retention Characteristics
1 10 100
1.0 1.5 2.0 2.5 3.0 4
log( ) 1.2 10 t
4
log( ) 2.7 10 t
Depolarization Leakage
log( ) 1.15 t log( ) 2.39 t
Vg(V)
Time(s)
PZT FeFET
What Limits the Retention Time?
- Depolarization Field
- Gate Leakage/Trapping
T.P. Ma and Jin-Ping Han, IEEE Electron Device Letters, 23(7), p.386 (2002).
Depolarization Field Comes from Incomplete Charge Compensation
For Ideal M-F-M Structure with Complete Charge Compensation, There is NO Depolarization Field
- Electrode
Electrode + + + +
- + + + +
Compensating Charge Compensating Charge
– P P +
Depolarization Field Comes from Finite MIS Capacitance
Gate voltage V induces polarization P, and voltage across ferroelectric VF = CISV/(CIS + CF) – P/(CIS + CF). When V goes to 0, VF + VIS = (QF – P)/CF + QIS/CIS = 0, which reduces to QF = PCIS/(CIS + CF), leading to a depolarization field Edp = PCF/(CIS + CF).
For FEDRAM, the finite insulator/semiconductor capacitance, CIS, causes incomplete charge compensation.
Gate Leakage/Trapping Causes Memory Loss
Electron (or Hole) Injection Followed by Trapping Leads to Local Charge Compensation and Gradually Diminished Effect of Polarization.
+ + +
- p-Si
M Jf(Ef, t) Ji(Ei) F I + +
- +
+ +
- p-Si
M Jf(Ef, t) Ji(Ei) F I
“ON” “OFF”
FeFET Memory Retention Loss Mechanisms
1 10 100
1.0 1.5 2.0 2.5 3.0 4
log( ) 1.2 10 t
4
log( ) 2.7 10 t
Depolarization Leakage
log( ) 1.15 t log( ) 2.39 t
Vg(V)
Time(s)
PZT FeFET
The Game Changer:
HfO2-Based Ferroelectrics
- CMOS Compatible Materials and Processes
- Desirable Combination of Dielectric
Constant, Remnant Polarization, and Coercive Field
- Scalability: Same as CMOS Gate Dielectric
- J. Müller et al., IEEE IEDM Technical Digest pp.10.8.4-10.8.5. (2013)
Retention Time For HfO2-Based FeFET
- Depolarization Field
Edp(HfO2) < Ec(HfO2) [~1MV/cm]:
Nearly No Rentention Loss Due to Depolarization Field
- Gate Leakage/Trapping
Trap Density in HfO2 is 2 Orders of Magnitude Lower Than those in PZT and SBT
Calculation of Edep
- Polarization, F and CF
- Series comb. CIS
- IL cap. CIL
- Semi cap. CS
CIS=CILCS/(CIL+CS) CILCS_min/(CIL+CS_min)<CIS<CIL
Edep = PCF/[F(CIS + CF)]
- N. Gong, and T.P. Ma, SISC 2016
Parameters affecting Edep
Comparison of Edep/Ec for HfO2, PZT, SBT
(Fixed MW) MWdFEc
- Edep/Ec (HfO2) is smallest
- Least retention loss
[1] W. Shih, et al., J. Appl. Phys. vol. 103, 2008. [2] S. Lee, et al., J. Appl. Phys. vol. 91, , 2002. [3] J. Müller, et al., ECS J. Solid State Sci. and Tech., vol. 4, 2015. [4] J. Müller, et al., ECS Trans., vol. 69 , 2015.
Fixed, the same MW
PZT SBT FE-HfO2 Ec 31 kV/cm 90 kV/cm 1 MV/cm
HfO2 largest Ec
HfO2 thinnest Scaling adv. Id Time
Fixed MW Less Retention Loss
HfO2 is most scalable & has longest retention
Why Edep/Ec (HfO2) is smallest? What about retention of scaled PZT/SBT?
[1] W. Shih, et al., J. Appl. Phys. vol. 103, 2008. [2] S. Lee, et al., J. Appl. Phys. vol. 91, 2002. [3] J. Müller, et al., ECS J. Solid State Sci. and Tech., vol. 42015. [4] J. Müller, et al., ECS Trans., vol. 69, 2015.
(Edep/Ec)min~ 2P/[MW*(CIL+CF)]
Why Edep/Ec is Small for HfO2
- Largest Ec
smallest dF largest CF smallest Edep/Ec
(Edep/Ec)max/ (Edep/Ec)min ~ CIL/(CF+CIS_min)
Scaling Consideration for FEDRAM
PZT & SBT Require Too Thick FE Layer – Not Suitable for Production
Scaling Consideration for FEDRAM
- J. Müller et al., IEEE IEDM Technical Digest pp.10.8.4-10.8.5. (2013)
HfO2-Based FeFET < 10nm in Thickness
Demonstration of 28nm FeFET Cell
Fabricated at Our Foundry Partner
Excellent Memory Characteristics
Sizable Memory Windows Have Been Measured
10-Year Retention of FeFET Cell
Endurance of HfO2-Based FeFET
Trade-off Between Retention and Endurance
High Endurance but Short Retention – DRAM Like
Excellent Manufacturability
Integrating FE-Gate with CMOS HKMG
Any advanced CMOS foundry can manufacture without new equipment.
Proposed 3-D FeFET Memory Arrays
US Patent Issued
Summary of FeFET Memory
- FeFET memory has numerous advantages over
conventional Flash
- Either Flash-like or DRAM-like memory can be
realized by tuning the programming strength
- Test memory cells have been demonstrated with
foundry partner’s 28nm technology
- It’s most suitable for eFlash applications
- It has great potential for low-cost, high-density
storage technology
Negative Capacitance: Science Fact or Science Fiction?
A Close Examination of Salahuddin/Data's Original Paper in Nano Letters
Negative Capacitance (NC) Was Proposed
11/15/2018 33
Salahuddin claimed that the ferroelectric capacitor can be negative!
- S. Salahuddin, S. Datta, Nano Letter (2008)
Ginzburg-Landau theory
11/15/2018 34
Phase transition from paraelectricity to ferroelectricity
NC Theory
11/15/2018 35
- S. Salahuddin, S. Datta, Nano Letter (2008)
Negative Capacitance! But unstable!
Quasi-Static NC (QSNC) theory
11/15/2018 36
“Quasi-static negative capacitance” (QSNC) theory
Amazing Predictions of the QSNC Theory
11/15/2018 37
- J. Van Houdt, et.al EDL
(2018)
What’s Wrong with the QSNC Theory?
11/15/2018 38
Mistake 1
11/15/2018 39
In equilibrium, only local minimum states exist! We need
Mistake 1 (Continued)
11/15/2018 40
“Negative Capacitance” region cannot exist in equilibrium
Mistake 2
11/15/2018 41
Therefore, the P-E (or P-V) “S Curve” cannot be translated directly to the Q-V curve
It’s well known that P ≠ Q in a FeFET
Why is it P ≠ Q in a MOSFET or any other circuit like the following?
Answer: Due to Incomplete Charge compensation
P Q Q
Vg
Ψs
P ≠ Q
Whenever there is a capacitor In series with the ferroelectric capacitor,
P ≠ Q,
which causes a depolarization field that hurts the retention time This is well known in the ferroelectric memory community*.
*IEEE Electron Device Letters, vol.23(7), 386 (2002)
Mistake 2 (Continued)
Mistake 2 (Continued)
11/15/2018 43
Actual Case
NC theory
Mistake 3
Ignoring the strong
Coupling of FE/DE Layers
11/15/2018 44
- J. Kittl, et.al APL (2018)
Mistake 3 (Continues)
11/15/2018 45
Experimental Verification
Experimental MFM Capacitor
11/15/2018 46
C-V Measurements
11/15/2018 47
The FE + DE Series Capacitance Always Shows Lower Total Capacitance
V
APP-VDE Measurements
11/15/2018 48
Sweep rate: 56V/ms Sweep rate: 56V/ms Sweep rate: 80V/ms Sweep rate: 80V/ms
VAPP-VDE Measurements (Continued)
11/15/2018 49
Sweep rate 14V: 56V/ms 8V: 32V/ms
f = 1kHz f = 1kHz f = 1kHz
Sweep rate 20V: 80V/ms 16V: 64V/ms 12V: 48V/ms 8V: 32V/ms
Summary of Negative Capacitance
- Salahuddin’s Quasi-Static Negative
Capacitance (QSNC) theory has been closely examined
- Several major mistakes have been
identified
- Experimental results did not support the 3