Welcome to the IS ISPD 2017 ACM In International Sym ymposium on - - PowerPoint PPT Presentation

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Welcome to the IS ISPD 2017 ACM In International Sym ymposium on - - PowerPoint PPT Presentation

Welcome to the IS ISPD 2017 ACM In International Sym ymposium on Physical Desig ign Organization Committee Steering Committee Chair General Chair Technical Program Chair Evangeline Young Mustafa Ozdal Chris Chu Chinese Univ. of Hong


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Welcome to the IS ISPD 2017

ACM In International Sym ymposium on Physical Desig ign

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Organization Committee

Technical Program Chair Chris Chu Iowa State Univ. General Chair Mustafa Ozdal Bilkent University

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Publication Chair Ismail Bustany Mentor Graphics Steering Committee Chair Evangeline Young Chinese Univ. of Hong Kong Contest Chair Stephen Yang Xilinx Publicity Chair Bill Swartz TimberWolf & UT Dallas

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Hotel Logistics

  • Complimentary internet access in guest rooms

and meeting room

– Wifi passcode: bus94 (Monday morning only) wrath39 (afterwards)

  • Meals at Willamette room

– Breakfast, lunch, and dinner

  • Your badge will also serve as meal tickets

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Symposium Logistics

  • Speakers

– Check in with your Session Chair and load your slides prior to your session – Keep on time – All slides will be posted (as PDF files) on the ISPD website. Please inform us if this is not acceptable.

  • Session Chairs

– Know your speakers, help to load slides in advance – Keep your sessions on time

  • Audience

– Please set your cell phones to silent/vibration mode – Questions are encouraged, interruptions are okay! Please identify yourself before asking questions

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Technical Program

  • Paper selection process

– 39 abstract submissions – Double-blind review process & in-person TPC meeting – 13 accepted papers

  • Variety of PD-related topics covered, including:

– Emerging challenges for current/future process technologies – FPGA layout – Clock & timing – Machine learning for EDA – …

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ISPD 2017 TPC

Yongchan Ban Globalfoundries Ismail Bustany Mentor Graphics Salim Chowdhury Formerly Oracle Chair: Chris Chu Iowa State Univ. Sabya Das Xilinx Sheqin Dong Tsinghua Univ. Mahesh Iyer Intel Iris Hui-Ru Jiang NCTU Jens Lienig TU Dresden Mark Po-Hung Lin NCCU Wen-Hao Liu Cadence David Newmark AMD Ulf Schlichtmann TU Munich Yasuhiro Takashima U of Kitakyushu Hua Xiang IBM Gary Yeap Synopsys Bei Yu CUHK

Chair

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Invited Talks

  • 3 keynote speeches

– “Technology Options for Beyond CMOS”, Ian Young (Intel) – “Pushing the Boundaries of Moore's Law to Transition from FPGA to All Programmable Platform”, Ivo Bolsens (Xilinx) – “Physical Design Challenges and Innovations to Meet Power, Speed, and Area Scaling Trend”, Lee-Chung Lu (TSMC)

  • 14 invited talks from industry and academia

Industry: Cadence, Intel, Microsoft, NEC, Synopsys, Xilinx Academia: Hosei Univ., National Taiwan Univ., NYU, UCSD, UFSC, UFRGS,

  • Univ. of Wisconsin-Madison, Waseda Univ.

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Steering Committee

Azadeh Davoodi

  • Univ. of Wisconsin

David Pan UT Austin Yao-Wen Chang National Taiwan Univ. Martin Wong UIUC Noel Menezes Intel Chair Patrick Groeneveld Synopsys

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Evangeline Young Chinese Univ. of Hong Kong Jiang Hu

  • Univ. of Texas A&M
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ISPD Lifetime Achievement Award 2017

Given to individuals who have made outstanding contributions to the field of physical design automation over multiple decades. The purpose is to recognize their lifetime of achievements and contributions in terms of research work, education, and professional service.

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  • Prof. Satoshi Goto

Please join us when we present this year's award to Prof. Satoshi Goto on Tuesday.

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ISPD 2017 Lifetime Achievement Award

Session 6: Commemoration for Prof. Satoshi Goto Tuesday 3:30 – 5:30 pm

Session Chair: Jinjia Zhou (Hosei University)

  • “The Spirit of in-house CAD Achieved by the Legend of Master "Prof. Goto" and his

Apprentices”, Yuichi Nakamura (NEC Corp.)

  • “Generalized Force Directed Relaxation with Optimal Regions and Its Applications to

Circuit Placement”, Yao-Wen Chang (National Taiwan University)

  • “100x Evolution of Video Codec Chips”, Jinjia Zhou (Hosei University)
  • “Physical Layout after Half a Century: From Back-Board Ordering to Multi-Dimensional

Placement and Beyond”, Chung-Kuan Cheng (University of California, San Diego)

  • “Past, Present and Future of the Research”, Satoshi Goto (Waseda University)

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Please join us when we present this year's award to Prof. Satoshi Goto, which will be held at the end of the session. Dinner party from 6:00 to 9:00pm.

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Contest: Clock-Aware FPGA Placement

  • Sponsored by ACM SIGDA and Xilinx Inc.

Co-organized by Xilinx

  • Continuous effort from last year’s

Routability-driven Placement

  • 13 teams registered from US, Canada,

Europe, Asia, South America

  • 9 final submissions
  • Winners to be announced Wednesday

morning (Session 8)

  • Top 5 teams will give 8-10 minute

presentations

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Bus Tour to Multnomah Falls: Wed 1:30-6:00pm

  • Scenic ride at Historic Columbia

River Highway

  • Women’s Forum Viewpoint
  • Multnomah Falls

Please sign-up if you’re planning to join Boarding: Wednesday 1:30pm (sharp)

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Sponsors and Supporters

Sponsor: Technical co-sponsor: Industry Financial Sponsors:

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Best Paper Award Candidates

  • Session 1: “Bilinear Lithography Hotspot Detection”, Hang Zhang, Fengyuan

Zhu, Haocheng Li, Evangeline F.Y. Young and Bei Yu

  • Session 5: “Automatic Cell Layout in the 7nm Era”, Pascal Cremer, Stefan

Hougardy, Jan Schneider and Jannik Silvanus

  • Session 7: “Pin Accessibility-Driven Detailed Placement Refinement”, Yixiao

Ding, Chris Chu and Wai-Kei Mak

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2017 ACM International Symposium on Physical Design

Best Paper Award

Presented to Hang Zhang , Fengyuan Zhu , Haocheng Li , Evangeline F. Y. Young , and Bei Yu for the paper “Bilinear Lithography Hotspot Detection”

March 19 – 22, 2017

Mustafa Ozdal General Chair Chris Chu Technical Program Chair Evangeline F. Y. Young Steering Committee Chair

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Monday Keynote

  • Senior Fellow and Director of Exploratory Integrated Circuits

in the Technology and Manufacturing Group of Intel.

  • Joined Intel in 1983
  • Technical contributions in Intel’s designs of DRAMs, SRAMs,

microprocessor clocking, mixed-signal circuits for high-speed I/O links, RF CMOS circuits for wireless transceivers, and research for optical I/O.

  • Recipient of the 2009 International Solid-State Circuits

Conference’s Jack Raper Award for Outstanding Technology Directions paper.

  • B.E.E. and M.S. from the University of Melbourne, Australia.
  • PhD in EECS from UC Berkeley
  • IEEE Fellow.

Technology Options for Beyond-CMOS

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  • Dr. Ian Young

Intel