LIU-ABT systems: PSB BI.DIS10 controls Agenda: - PowerPoint PPT Presentation

CERN TE-ABT-EC LIU-ABT systems: PSB BI.DIS10 controls • Agenda: https://indico.cern.ch/event/610712/ • General controls (Roger Andrew Barlow) • Timing system (Christophe Chanavat) • Fast interlocks studies (Felipe Cordobes Dominguez) • IGBT’s R&D program (Tobias Stadlbauer & Luc Sermeus) prepared by R.A.Barlow 16/02/2017 1

BI.DIS10 Production and Design HW Status of production • Changeover PP in production at ADTE Status of hardware development • New PFN AFO crate system with optical drivers integrated, .... ? Remaining issues • PFN patch panels, to be realized in Catia (from Visio) and produced ..... request sent to Wim • Cabling of PFN patch panel by FSU • Cabling of cassettes by FSU (removed from the FSU planning at the moment due to EYETS priority) 2

BI.DIS10 Storage area – 867 – R-P76 PS..7 of PDC PLC chassis Needs (from YS) • Europe type pallet, wrap film, names of elements Future • Racks to emulate system in BCER (need to study encumbrance) • Test all PLC crates to the maximum without peripherals connected 3

BI.DIS10 Vs PFN sent to KiT’s system KiT’s I/P AFO O/P VS1 pfn From HV divider 0..10 V Discussion • AFO crate • HV divider status • Where are we at ?

BI.DIS10 Vref sent from KiT’s to GPC PLC chassis KiT’s O/P GPC system Vref Redirect to PS 0..10 V (0..10) from PP Discussion • ?

BI.DIS10 Trigger signal routing from KiT’s to FIS IGBT triggers sent from KiT’s to FIS KiT’s O/P FIS system Triggers (0..10) from PP ??? 0..10 V ??? Discussion • ?

BI.DIS10 Technix PS ex tint PS ext interlock Digital input, Technix PS ex tint Technix PS From PS interlock (p13,14 OR Lemo 2 status crate pin) – dry contact (0..10) from PP Discussion • Presently linked to ‘old’ PS crate, were should it come from now ? • What do we want as Ext Interlock, FID’s ?

BI.DIS10 Technix PS volt inhibit Technix KiT’s Volt inh +5V to +24V signal ??? Discussion • Directly linked to KiT’s system ?

BI.DIS10 BIS system BIS system Master CPU Open collectors Discussion • ?

BI.DIS10 Vac interlock Vac Balzer Master CPU Analog + dig (0..10V), dry con Discussion • ?

BI.DIS10 Remaining controls topic Discussion • KiT’s IEPLC to Debug with CC in monitoring room, when CC available • FIS Fesa structure (NM) + GUI design • Optical feedback from Driver