Drive Strength Aware Cell Movement Techniques for Timing Driven - - PowerPoint PPT Presentation

Drive Strength Aware Cell Movement Techniques for Timing Driven Placement

Guilherme Flach, Mateus Fogaça, Jucemar Monteiro, Marcelo Johann and Ricardo Reis

Universidade Federal do Rio Grande do Sul (UFRGS) - Brazil jucemar.monteiro@inf.ufrgs.br

Introduction Contributions Evaluation Metrics Late Timing-Driven Placement Techniques Early Timing-Driven Placement Techniques ABU Improvement Experimental Results Conclusion

2

Agenda

Introduction

4

Introduction

5

Interconnection Characteristics

6

Path Characteristics

Fixed Fixed

7

UPlacer

8

Early and Late Timing Violations

Launch point Capture point Early Violation

9

Early and Late Timing Violations

Late Violation Early Violation Launch point Capture point

10

Early and Late Timing Violations

Late Violation Early Violation No Timing Violation Launch point Capture point

Contributions

12

Contributions

Local-cell movements a local optimum solution

13

Contributions

Cell Movement

Improve timing by balancing wire capacitance and resistance Local-cell movements a local optimum solution

Evaluation Metrics

15

Driver Sensitivity Calculations Metrics

X4 X1 X1

16

Driver Sensitivity Calculations Metrics

X4 X1 X1

Direction of Cell Movement to minimize timing violation

17

Criticality = Worst Negative Slack(pin) Worst Negative Slack (circuit)

Metrics

18

Criticality = Worst Negative Slack(pin) Worst Negative Slack (circuit)

Metrics

A B

WNS(circuit) = 20 WNS(A) = 14 WNS(B) = 6

19

Criticality = Worst Negative Slack(pin) Worst Negative Slack (circuit)

Metrics

A B

WNS(circuit) = 20 Criticality(A) = 0.7 Criticality(B) = 0.3

20

Centrality: Indirect measure of how many and how critical are the endpoints affected by a pin

A B 1 9

Metrics

21

Centrality: Indirect measure of how many and how critical are the endpoints affected by a pin

A B 1 9 10

Metrics

22

Centrality: Indirect measure of how many and how critical are the endpoints affected by a pin

A B 1 9 criticality(A) = 0.7 criticality(B) = 0.3 10 7 3

Metrics

7 = 0.7 x 10

Late Optimization

For each critical cell

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Clustered Cell Movement

N2 N1 N3 N4

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Clustered Cell Movement

N2 N1 N3 N4

Make clusters of topological neighbour cells

26

Clustered Cell Movement

N2 N1 N3 N4

Find the center of mass for the cluster

27

Clustered Cell Movement

N2 N1 N3 N4

Find new cluster position to minimize timing violations

28

Clustered Cell Movement

N2 N1 N3 N4

Move cells toward to new cluster center

Buffer Balancing

Goal Minimize segment delay by balancing driver/sink load and delay.

displacement delay displacement delay 29

Buffer Balancing

Assumptions and Formulation Elmore delay. Single driver/sink. Driver/sink won’t move.

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Buffer Balancing

Assumptions and Formulation Elmore delay. Single driver/sink. Driver/sink won’t move Analytical Formulation

d0 d1 a 31 d0 d1 a

Cell Balancing

Extension of buffer balancing movement

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Cell Balancing

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Driver Point Sink Point Driver and Sink

Cell Balancing

Analytical Formulation

34 d0 d1 a driver point sink point

Cell Balancing

New Cell Position

35

Driver Point Sink Point

• Critical nets
• Load Capacitance
• ptimization

CS D 36

Load Optimization

• Critical nets
• Load Capacitance
• ptimization
• Non critical sinks
• Move toward to its driver

CS D 37

Load Optimization

Early Optimization

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• Clock Skew Target
• Startpoint register
• Reduce local clock load

capacitance and resistance

39

Skew Optimization

LCB FF

• Clock Skew Target
• Startpoint register
• Reduce local clock load

capacitance and resistance

• Move closer to LCB

40

Skew Optimization

LCB FF

Combinational critical cells

41

Iterative Cell Spreading

Searching in four directions

42

Iterative Cell Spreading

Move the cell to the local optimum position

43

Iterative Cell Spreading

Assignment problem Hungarian algorithm Local Clock Network

LCB 3 2 7 4 1 6 5 8 LCB C B G D A F E H C B G D A F E H 1 2 3 4 5 6 7 8 . . .

44

Register Swap

Minimize total cost of assignment

LCB 3 2 7 4 1 6 5 8 LCB C B G D A F E H LCB 8->C 7->B 2->G 5->D 6->A 4->F 1->E 3->H C B G D A F E H 1 2 3 4 5 6 7 8 6 7 8 5 1 4 2 3 . . .

45

Register Swap

Assumptions Registers are equal Clock network keeps its timing characteristic

LCB 3 2 7 4 1 6 5 8 LCB C B G D A F E H LCB 8->C 7->B 2->G 5->D 6->A 4->F 1->E 3->H C B G D A F E H 1 2 3 4 5 6 7 8 6 7 8 5 1 4 2 3 . . .

46

Register Swap

Early critical paths composed by two registers

LCB 47

Register-to-Register Path Fix

Moving endpoint register apart

LCB 48

Register-to-Register Path Fix

ABU Optimization

Only for area overflow Bins Non Critical Cells ranked by slack

1 5 4 2 3

50

ABU Reduction

Move cells to non critical bins Evaluate incremental local timing

51

ABU Reduction

1 5 4 2 3

Improvement Flow

Early Optimization Late Optimization Skew Optimization Iterative Spreading Register Swap Reg-To-Reg Path Fix Buffer Balancing Cell Balancing Load Optimization Clustered Move ABU Reduction Initial Placement

53

Incremental Timing-Driven Placement Flow

• Quality Score

○ Weighted average for timing improvement

Early Optimization Late Optimization Skew Optimization Iterative Spreading Register Swap Reg-To-Reg Path Fix Buffer Balancing Cell Balancing Load Optimization Clustered Move ABU Reduction Initial Placement

54

Incremental Timing-Driven Placement Flow

• Quality Score

○ Weighted average for timing improvement

• After each Step

○ Steiner Trees update ○ Timing update ○ Evaluate Quality Score improvement ○ Rollback last solution if QS decreases ■ Iterative Spreading accepts a certainty draw back in QS

Early Optimization Late Optimization Skew Optimization Iterative Spreading Register Swap Reg-To-Reg Path Fix Buffer Balancing Cell Balancing Load Optimization Clustered Move ABU Reduction Initial Placement

55

Incremental Timing-Driven Placement Flow

• Quality Score

○ Weighted average for timing improvement

• After each Step

○ Steiner Trees update ○ Timing update ○ Evaluate Quality Score improvement ○ Rollback last solution if QS decreases ■ Iterative Spreading accepts a certainty draw back in QS

• After each cell movement

○ Update locally Steiner Trees ○ Update locally timing ○ Evaluate timing cost ■ 2Xcentrality + criticality ○ Reject movement if timing cost increases ○ Legalize cell

Early Optimization Late Optimization Skew Optimization Iterative Spreading Register Swap Reg-To-Reg Path Fix Buffer Balancing Cell Balancing Load Optimization Clustered Move ABU Reduction Initial Placement

56

Incremental Timing-Driven Placement Flow

• Incremental legalization
• Nearest area with enough

free space

57

Cell Legalization

• Incremental legalization
• Nearest area with enough

free space

• Placing cell in the available

position

• Placed cells are not moved

58

Cell Legalization

Experimental Results

• UPlacer tool
• C++-11
• Incremental Timer
• Incremental Legalizer - Jezz
• Two maximum cell displacement (short and long)
• 2015 ICCAD contest benchmark

○ 8 circuits

• Comparison with 1st Placed team at 2015 ICCAD

contest

60

Experimental Setup

61

Short Displacement

Comparison with 1st Placed team at 2015 ICCAD contest

62

67% of improvement in QS compared with first place at ICCAD 2015 contest

Long Displacement

Comparison with 1st Placed team at 2015 ICCAD contest

63

Individual Techniques Gain

• Incremental Timing-driven Placement flow
• Local-Cell move techniques
• Optimize early and late timing violations
• Wire load capacitance and resistance
• Outperforms state-of-arts results (ICCAD 15

contest teams)

• Local Timing improvement can achieve a huge

minimization in timing violation

64

Conclusion

Drive Strength Aware Cell Movement Techniques for Timing Driven Placement

Guilherme Flach, Mateus Fogaça, Jucemar Monteiro, Marcelo Johann and Ricardo Reis

Universidade Federal do Rio Grande do Sul (UFRGS) - Brazil jucemar.monteiro@inf.ufrgs.br

Timing Evaluation Metric

66

Quality Score (QS) QS = 10 x ΔTNSlate + 2 x ΔTNSearly + 5 x ΔWNSlate + ΔWNSearly