Digital Circuits and Systems Combinational Design Decoders + - - PowerPoint PPT Presentation

Shankar Balachandran* Associate Professor, CSE Department Indian Institute of Technology Madras

*Currently a Visiting Professor at IIT Bombay

Digital Circuits and Systems

Spring 2015 Week 3 Module 13

Combinational Design Decoders + Encoders

Combinational Circuits

 Combinational circuit is one in which output is

• nly dependent on the current input.

 As a circuit you will not see any feedback loops  Given the current inputs, one can analyze and

say what the output must be

 Need not know past history of values

 Basic gates like AND, OR, NOT, NAND, NOR,

XOR, XNOR are all combinational

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Combinational Design + Decoders/Encoders 6

Combinational Logic Design

 Understand the Problem:

 understand input/output behavior  identify the inputs, outputs, and control signals  draw a top level block diagram if necessary

 Formulate in a Standard Representation:

 truth tables or Boolean equations

 Choose an Implementation:

 discrete logic gates  programmable logic devices: PAL, PLA, ROM, FPGA

 Apply the Design Procedure:

 follow the representation → minimization → implementation

algorithm mechanically

 simulate your circuit before implementing it on actual devices  implement it on actual devices and verify your implementation.

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Example: Process Line Control



Design a controller to select right length metal rods out of rods of varying length (±10%) traveling one at a time on a conveyor belt. Rods that are within spec. (±5%) remain on the belt. Rods that are too short or too long are discarded by mechanical arm(s).

+10% +5%

• 10%
• 5%

Spec Rod within spec Rod too long Rod too short

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Example (contd…)

a b c Reject 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 1 X 1 1 1 1 1 1

+10% +5%

• 10%
• 5%

Spec within spec too long too short

a c b

in spec too long too short

 

ab Reje a c ct ac b    

00 01 11 10 1 1 X 1

a bc

Building Blocks for Combinational Circuits

 Decoders  Encoders  Multiplexers  Demultiplexers

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Combinational Design + Decoders/Encoders 10

Decoders

 Binary-to-Decimal decoder: n inputs, 2n outputs (n x 2n

decoder). Some decoders have enable inputs.

 Each output represents a minterm of an n-variable

• function. The output that corresponds to the minterm that

appears on the inputs is asserted (active low or high depending upon the device), all other outputs are inactive. s1 s0

EN

D3 D2 D1 D0 1 1 1 1 1 1 1 1 1 1 1 1 X X

Decoder

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D2 D3 D1 D0 s0 s1 Internal Structure

s0 sn-1

D1 D2 -1

n

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 Build a 4x16 decoder using 2x4 decoders (decoder tree)..

a b c d EN minterm

1 m0 1 1 m1 1 1 m2 1 1 1 m3 1 1 m4 1 1 1 m5 1 1 1 m6 1 1 1 1 m7 1 1 m8 1 1 1 m9 1 1 1 m10 1 1 1 1 m11 1 1 1 m12 1 1 1 1 m13 1 1 1 1 m14 1 1 1 1 1 m15 X X X X

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Implementing Logic using Decoders

 Decoders can be used to implement logic functions as

follows:

1

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BCD-7 Segment Decoder

A B C D a b c d e f g

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 d d d d a b c d e f g

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Encoders

 Encoder is opposite of decoder. Its output code has

fewer bits than the input code.

 Binary Encoder:

 Input:

1-out-of-2n code (decimal input).

 Output:

n-bit binary code.

End of Week 3: Module 13

Thank You

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