Digital Circuits and Systems Minimizing Dont Cares Shankar - - PowerPoint PPT Presentation

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Digital Circuits and Systems Minimizing Dont Cares Shankar - - PowerPoint PPT Presentation

Spring 2015 Week 2 Module 10 Digital Circuits and Systems Minimizing Dont Cares Shankar Balachandran* Associate Professor, CSE Department Indian Institute of Technology Madras *Currently a Visiting Professor at IIT Bombay Dont Care


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SLIDE 1

Shankar Balachandran* Associate Professor, CSE Department Indian Institute of Technology Madras

*Currently a Visiting Professor at IIT Bombay

Digital Circuits and Systems

Spring 2015 Week 2 Module 10

Minimizing Don’t Cares

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SLIDE 2

Don't Care Minimization 2

Don’t Care Input Combinations

 Sometimes functions are incompletely specified; the

function is not defined for some minterms.

 outputs really don’t matter when these input combinations occur,

  • r

 these input combinations never occur in normal operation.

 These input combinations are known as don’t care

conditions.

 Don’t cares are entered as X’s in the K-map (sometimes D or d

are also used).

 During simplification, X’s can be treated as 1’s or 0’s.

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SLIDE 3

Don't Care Minimization 3

Example: Combinational Logic Design

 Design a circuit that accepts binary numbers between 1

and 5 and generates an output equal to the number of 1’s in the input. Use only 2-input logic gates.

 Determine the number of inputs and outputs

 No. of inputs = 3  No. of outputs = 2

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SLIDE 4

Don't Care Minimization 4

  • 2. K-maps and logic minimization

00 01 11 10

X 1 1

1

1 X X

00 01 11 10

X 1

1

1 X X

b2 b1 b0 b2 b1 b0 z0 z1

Inputs Outputs b2 b1 b0 z1 z0 X X 1 1 1 1 1 1 1 1 1 1 1 1 1 1 X X 1 1 1 X X 1. Create a truth table 1 2 b b b z  

 

1 2 1 1 2 1 b b b z b b b b z    

  • r
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SLIDE 5

Don't Care Minimization 5

  • 3. Gate level implementation

1 2 b b b z  

 

1 2 1 b b b z  

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SLIDE 6

Don't Care Minimization 6

Example:

A circuit that will increment a BCD digit by 1 and produce an output BCD digit.

a b c d W X Y Z

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 X X X X

X X X X 1 1 1 1 X X X X

W

10 11 01 00 10 11 01 00

ab cd

X X X X X X X

10 11 01 00 10 11 01 00

ab cd

X X X X X X 1 1 1 1 1 1 Y

10 11 01 00 10 11 01 00

ab cd

X X X X X X 1 1 1 1 Z

10 11 01 00 10 11 01 00

ab cd

X X X X X X 1 1 1 1 1

W ad bcd   X bc bd bcd    Y acd cd   Z d 

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SLIDE 7

Don't Care Minimization 7

Do it yourself

Obtain minimum SOP and POS expressions for the following functions. For selected problems, implement circuits using NAND and NOR gates.

( , , ) (2,3). (7) F A B C d   ( , , ) (1,2,3,5,7) F A B C  

( , , ) (4,6) F A B C  ( , , , ) (2,3,6,7,8,9,12,13) (11,15) F W X Y Z d  

( , , , ) (0,3,4,5,6,7,11,12,13,14,15) F W X Y Z  ( , , , ) (0,2,5,7,8,10,13) (1,9,11) F W X Y Z d  

( , , ) (1,2,3,5,6). (4) F A B C d  

* * *

( , , , ) (2,3,6,7,8,9,12,13) F W X Y Z 

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SLIDE 8

End of Week 2: Module 10

Thank You

Don't Care Minimization 8