Digital Circuits and Systems Minimizing Dont Cares Shankar - PowerPoint PPT Presentation

Spring 2015 Week 2 Module 10 Digital Circuits and Systems Minimizing Don’t Cares Shankar Balachandran* Associate Professor, CSE Department Indian Institute of Technology Madras *Currently a Visiting Professor at IIT Bombay

Don’t Care Input Combinations  Sometimes functions are incompletely specified; the function is not defined for some minterms.  outputs really don’t matter when these input combinations occur, or  these input combinations never occur in normal operation.  These input combinations are known as don’t care conditions.  Don’t cares are entered as X ’s in the K -map (sometimes D or d are also used).  During simplification, X’s can be treated as 1’s or 0’s. Don't Care Minimization 2

Example: Combinational Logic Design  Design a circuit that accepts binary numbers between 1 and 5 and generates an output equal to the number of 1’s in the input. Use only 2-input logic gates.  Determine the number of inputs and outputs  No. of inputs = 3  No. of outputs = 2 Don't Care Minimization 3

2. K-maps and logic minimization 1. Create a truth table z0 b1 b0 Inputs Outputs b2 00 01 11 10 b2 b1 b0 z1 z0 X 1 1 0 0 0 0 X X 1 1 X X 0 0 1 0 1   z 0 b 0 b 2 b 1 0 1 0 0 1 z1 b1 b0 0 1 1 1 0 b2 00 01 11 10 1 0 0 0 1 X 1 0 1 0 1 1 0 1 1 X X 1 1 0 X X   z 1 b 2 b 0 b 1 b 0 or   1 1 1 X X   z 1 b 0 b 2 b 1 Don't Care Minimization 4

3. Gate level implementation     z 1 b 0 b 2 b 1   z 0 b 0 b 2 b 1 Don't Care Minimization 5

Example: A circuit that will increment a BCD digit by 1 and produce an output BCD digit.  X W cd cd ab ab 00 01 11 10 00 01 11 10 a b c d W X Y Z 1 00 00 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 1 1 1 1 01 01 0 0 1 0 0 0 1 1 X X 11 X X 11 X X X X 0 0 1 1 0 1 0 0 0 1 0 0 0 1 0 1 10 1 X 10 X X X 0 1 0 1 0 1 1 0      W ad bcd X bc bd bcd 0 1 1 0 0 1 1 1 Y Z 0 1 1 1 1 0 0 0 cd cd ab ab 00 01 11 10 00 01 11 10 1 0 0 0 1 0 0 1 1 0 0 1 0 0 0 0 1 1 00 00 1 1 1 0 1 0 X X X X 1 1 01 01 1 1 … X X X X X X X X X X 11 X 11 X 1 1 1 1 X X X X 10 X X 10 1 X X    Y acd cd Z d Don't Care Minimization 6

Do it yourself Obtain minimum SOP and POS expressions for the  following functions. For selected problems, implement circuits using NAND and NOR gates.    F W X Y Z ( , , , ) (0,2,5,7,8,10,13) d (1,9,11)   * F A B C ( , , ) (1,2,3,5,6). (4) d F W X Y Z   ( , , , ) (0,3,4,5,6,7,11,12,13,14,15)    * F W X Y Z ( , , , ) (2,3,6,7,8,9,12,13) d (11,15) F A B C   ( , , ) (4,6) *   F A B C ( , , ) (2,3). (7) d F A B C   ( , , ) (1,2,3,5,7) F W X Y Z   ( , , , ) (2,3,6,7,8,9,12,13) Don't Care Minimization 7

End of Week 2: Module 10 Thank You Don't Care Minimization 8