Arithmetizing Circuits around NC 1 and L Raghavendra Rao B V - - PowerPoint PPT Presentation

arithmetizing circuits around nc 1 and l
SMART_READER_LITE
LIVE PREVIEW

Arithmetizing Circuits around NC 1 and L Raghavendra Rao B V - - PowerPoint PPT Presentation

Arithmetizing Circuits around NC 1 and L Raghavendra Rao B V Institute of Mathematical Sciences, Chennai 23 February, 2007 Joint work with Nutan Limaye and Meena Mahajan Arithmetizing Circuits around NC 1 and L Raghavendra Rao B V Institute of


slide-1
SLIDE 1

Arithmetizing Circuits around NC 1 and L

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai 23 February, 2007 Joint work with Nutan Limaye and Meena Mahajan

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 1 / 20

slide-2
SLIDE 2

Boolean Circuits

∨ ∧ ∧ ∧ ∨ ∨

(x1x3 ∨ x1 ¯ x4 ∨ x2x3 ∨ x2 ¯ x4 ∨ ¯ x1 ¯ x2 ¯ x3) x1 x2 x3 ¯ x1 ¯ x3 ¯ x4

Definition

Directed acyclic graph where nodes labeled with {∨, ∧, ¬, 0, 1, x1, . . . , xn}. A node of out-degree zero, called output node of the circuit {x1, · · · , xn} are the inputs for the circuit, where xi ∈ {0, 1} fan in(fan out) of a node is its in-degree(out-degree) depth - length of longest path from output node to input node width - maximum number of nodes at any particular level

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 2 / 20

slide-3
SLIDE 3

NC 1

Definition

Class of problems which can be decided by O(log n) depth, poly size, constant fan-in circuits Examples:

◮ parity of n bits, ◮ sorting n numbers, ◮ evaluating a boolean formula

Upper bound: NC 1 ⊆ DLOG

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 3 / 20

slide-4
SLIDE 4

Classes Equivalent to NC 1

Bounded Width Branching Programs : BWBP Bounded Width Circuits : BWC Log Width Formula : LWF Branching Program over NFA : BP-NFA Branching Program over Visibly Pushdown Automata : BP-VPA

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 4 / 20

slide-5
SLIDE 5

Branching Programs

. . .

t

x1 ¯ x1 ¯ x2 x2 x2 ¯ x2

s

Figure: Width-2 branching program for parity

Definition (BWBP)

Bounded Width Branching Programs (poly size).

Theorem ( Barrington ’89 )

BWBP = NC 1

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 5 / 20

slide-6
SLIDE 6

Bounded Width Circuits

Definition (SC i)

SC i = DTIME-SPACE(poly, logi n) = CircuitSize, Width(poly, logi n) BWC = SC 0 (by definition) BWC ⊆ NC 1 (divide-and-conquer) BP =skew-circuits, hence BWBP ⊆ BWC

Example

1 x1 ¯ x2 ¯ x2 ¯ x1 x2 x2 ∨ ∨ ∨ ∨ ∨ ∧ ∧ ∧ ∧ ∧ ∧ x1 ¯ x1 x2 ¯ x2 ¯ x2 x2

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 6 / 20

slide-7
SLIDE 7

Log Width Formula

Definition (Formula)

A circuit where fan out is at most one (i.e a tree )

Definition (LWF)

Logarithmic Width Formula.

Theorem ( Istrail, Zivkovic ’94 )

NC 1 = LWF

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 7 / 20

slide-8
SLIDE 8

BP-NFA

Program Input P Projection Two way input tape NFA One way input tape Accept/Reject · · · · · · If xi = 0 then a else b Σ∗ ∆∗ · · · · · ·

Theorem (Barrington ’89 )

BWBP = BP-NFA

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 8 / 20

slide-9
SLIDE 9

Visibly Pushdown Automaton: VPA

Definition (Mehlhorn ’80... Alur,Madhusudan’04 )

A Visibly Pushdown Automaton is a Pushdown automaton M, with input alphabet ∆ partitioned as (∆push, ∆pop, ∆int) M’s action is guided by the input alphabet

Example

Language {anbn|n ≥ 0} can be recognized by VPAs.

Theorem ( follows from Dymond ’88 )

BP-VPA ⊆ NC 1

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 9 / 20

slide-10
SLIDE 10

Classes Equivalent to NC 1

NC 1 log depth, poly size circuits with fanin-2 BWBP bounded width branching programs BWC bounded width circuits LWF log width formula BP-NFA programs over NFA BP-VPA programs over VPA Are their arithmetic versions equivalent?

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 10 / 20

slide-11
SLIDE 11

Arithmetization over N

Circuits

◮ Replace ∧ with × and ∨ with +. ◮ Counting number of proving subtrees

Branching Programs

◮ Counting the number of s-t paths in a branching program ◮ Counting the number of accepting paths in M, for

BP-M(M = VPA, NFA)

Arithmetic classes: #NC 1, #BWBP, #LWF, #BP-NFA, #BP-VPA, #BWC

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 11 / 20

slide-12
SLIDE 12

Theorem (Caussinus et al ’98 ,Istrail Zivkovic ’94 )

#BWBP = #BP-NFA ⊆ #NC 1 = #LWF

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 12 / 20

slide-13
SLIDE 13

Our Results

#BP-VPA = #BP-NFA #BWC = #SC 0 needs restrictions to become interesting We propose a restriction #sSC 0

#BP-NFA #BP-V PA #NC1 #BWBP #LWF #sSC0 FL

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 13 / 20

slide-14
SLIDE 14

Infeasibility of #BWC

A width two circuit can compute super exponential values

· · ·

22n ⊗ ⊕ ⊗ ⊗ ⊗

1 1

poly degree ⇒ feasible values poly degree, poly size = SAC 1 = LogCFL NLOG ⊆ LogCFL ⊆ NC 2

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 14 / 20

slide-15
SLIDE 15

Degree of a circuit

∨ ∨ x1 x2 x1 x3 x4 x1.x2 ∧ ∧ x1x2x3 + x1x4 x3 + x4 x1.x2 + x1

Figure: A Degree-3 circuit

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 15 / 20

slide-16
SLIDE 16

Definition

sSC i = Poly degree, poly sized circuits of width O(logi n) Observation: NC 1 = sSC 0 = SC 0 Open Question: sSC 1 ? = SC 1(= DLOG)

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 16 / 20

slide-17
SLIDE 17

Understanding sSC 1

NC 1 ⊆ sSC 1 ⊆ DLOG Examine closure properties. Is sSC 1 closed under complementation ?

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 17 / 20

slide-18
SLIDE 18

Understanding sSC 1

NC 1 ⊆ sSC 1 ⊆ DLOG Examine closure properties. Is sSC 1 closed under complementation ? – Naive negation blows up the degree.

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 17 / 20

slide-19
SLIDE 19

Theorem

co-sSC i ⊆ sSC 2i

Proof.

Main ideas Inductive counting on layered circuits, as used by Borodin, Cook, Dymond, Ruzzo, Tompa ’89 to complement SAC 1. Monotone branching programs for threshold, as used by Vinay ’96 to complement log width BPs.

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 18 / 20

slide-20
SLIDE 20

Arithmetizing sSC - Overall picture

#BWBP #sSC0 #NC1 FL SC2 #SAC1 NC2 #sSC1 #sSCi SCi+1

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 19 / 20

slide-21
SLIDE 21

Open questions

sSC 1 ? = DLOG co-sSC i

?

= sSC i, i > 0 #sSC 1 ? ⊆ FL What closure properties do #sSC i have ? We show that #sSC 0 is closed under div by a constant, decrement.

Raghavendra Rao B V Institute of Mathematical Sciences, Chennai () Arithmetizing Circuits around NC1 and L 23 February, 2007 20 / 20