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On the Relationship between Reachability Problems in Timed and - - PowerPoint PPT Presentation

On the Relationship between Reachability Problems in Timed and Counter Automata Christoph Haase 1 , 2 Jol Ouaknine 2 James Worrell 2 1 now at LSV, CNRS & ENS de Cachan, France 2 Department of Computer Science, University of Oxford, UK


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SLIDE 1

On the Relationship between Reachability Problems in Timed and Counter Automata

Christoph Haase1,2 Joël Ouaknine2 James Worrell2

1now at LSV, CNRS & ENS de Cachan, France 2Department of Computer Science, University of Oxford, UK

Reachability Problems ’12 — September 18, 2012

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SLIDE 2

Introduction

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SLIDE 3

Timed Automata

  • Comprise a finite-state controller with a finite number of clocks

ranging of R≥0

  • Along transitions clocks can be compared to constants and

reset

  • Constants are encoded in binary
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SLIDE 4

Timed Automata

  • Comprise a finite-state controller with a finite number of clocks

ranging of R≥0

  • Along transitions clocks can be compared to constants and

reset

  • Constants are encoded in binary
slide-5
SLIDE 5

Timed Automata

  • Comprise a finite-state controller with a finite number of clocks

ranging of R≥0

  • Along transitions clocks can be compared to constants and

reset

  • Constants are encoded in binary
slide-6
SLIDE 6

Timed Automata

  • Comprise a finite-state controller with a finite number of clocks

ranging of R≥0

  • Along transitions clocks can be compared to constants and

reset

  • Constants are encoded in binary
slide-7
SLIDE 7

Timed Automata

  • Comprise a finite-state controller with a finite number of clocks

ranging of R≥0

  • Along transitions clocks can be compared to constants and

reset

  • Constants are encoded in binary
slide-8
SLIDE 8

Timed Automata

  • Comprise a finite-state controller with a finite number of clocks

ranging of R≥0

  • Along transitions clocks can be compared to constants and

reset

  • Constants are encoded in binary
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SLIDE 9

Reachability in Timed Automata

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SLIDE 10

Reachability in Timed Automata

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SLIDE 11

Reachability in Timed Automata

1 2 3 4

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SLIDE 12

Reachability in Timed Automata

1 2 3 4

Can we reach (4, x → 1, y → 23) starting in (1, x → 4, y → 2)

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SLIDE 13

Reachability in Timed Automata

1 2 3 4

Can we reach (4, x → 1, y → 23) starting in (1, x → 4, y → 2)

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SLIDE 14

Reachability in Timed Automata

1 2 3 4

Can we reach (4, x → 1, y → 23) starting in (1, x → 4, y → 2) Yes we can!

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SLIDE 15

Reachability in Timed Automata

1 2 3 4

Can we reach (4, x → 1, y → 23) starting in (1, x → 4, y → 2)

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SLIDE 16

Reachability in Timed Automata

1 2 3 4

Can we reach (4, x → 1, y → 23) starting in (1, x → 4, y → 2) (1, x → 4, y → 2)

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SLIDE 17

Reachability in Timed Automata

1 2 3 4

Can we reach (4, x → 1, y → 23) starting in (1, x → 4, y → 2) (1, x → 4, y → 2) → (2, x → 0, y → 0)

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SLIDE 18

Reachability in Timed Automata

1 2 3 4

Can we reach (4, x → 1, y → 23) starting in (1, x → 4, y → 2) (1, x → 4, y → 2) → (2, x → 0, y → 0) (2, x → 1, y → 1)

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SLIDE 19

Reachability in Timed Automata

1 2 3 4

Can we reach (4, x → 1, y → 23) starting in (1, x → 4, y → 2) (1, x → 4, y → 2) → (2, x → 0, y → 0) (2, x → 1, y → 1) → (3, x → 0, y → 1)

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SLIDE 20

Reachability in Timed Automata

1 2 3 4

Can we reach (4, x → 1, y → 23) starting in (1, x → 4, y → 2) (1, x → 4, y → 2) → (2, x → 0, y → 0) (2, x → 1, y → 1) → (3, x → 0, y → 1) (3, x → 0.5, y → 1.5)

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SLIDE 21

Reachability in Timed Automata

1 2 3 4

Can we reach (4, x → 1, y → 23) starting in (1, x → 4, y → 2) (1, x → 4, y → 2) → (2, x → 0, y → 0) (2, x → 1, y → 1) → (3, x → 0, y → 1) (3, x → 0.5, y → 1.5) → (2, x → 0.5, y → 1.5)

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SLIDE 22

Reachability in Timed Automata

1 2 3 4

Can we reach (4, x → 1, y → 23) starting in (1, x → 4, y → 2) (1, x → 4, y → 2) → (2, x → 0, y → 0) (2, x → 1, y → 1) → (3, x → 0, y → 1) (3, x → 0.5, y → 1.5) → (2, x → 0.5, y → 1.5) (2, x → 1, y → 2)

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SLIDE 23

Reachability in Timed Automata

1 2 3 4

Can we reach (4, x → 1, y → 23) starting in (1, x → 4, y → 2) (1, x → 4, y → 2) → (2, x → 0, y → 0) (2, x → 1, y → 1) → (3, x → 0, y → 1) (3, x → 0.5, y → 1.5) → (2, x → 0.5, y → 1.5) (2, x → 1, y → 2) → · · ·

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SLIDE 24

Reachability in Timed Automata

1 2 3 4

Can we reach (4, x → 1, y → 23) starting in (1, x → 4, y → 2) (1, x → 4, y → 2) → (2, x → 0, y → 0) (2, x → 1, y → 1) → (3, x → 0, y → 1) (3, x → 0.5, y → 1.5) → (2, x → 0.5, y → 1.5) (2, x → 1, y → 2) → · · · → (2, x → 1, y → 23)

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SLIDE 25

Reachability in Timed Automata

1 2 3 4

Can we reach (4, x → 1, y → 23) starting in (1, x → 4, y → 2) (1, x → 4, y → 2) → (2, x → 0, y → 0) (2, x → 1, y → 1) → (3, x → 0, y → 1) (3, x → 0.5, y → 1.5) → (2, x → 0.5, y → 1.5) (2, x → 1, y → 2) → · · · → (2, x → 1, y → 23)→ (4, x → 1, y → 23)

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SLIDE 26

Reachability in Timed Automata

  • General reachability problem is PSPACE-complete [Alur, Dill

1994]

  • Reachability is PSPACE-complete for 3 clocks, or for an

unbounded number of clocks and constants from {0, 1} [Courcoubetis, Yannakakis, 1992]

  • Reachability is NLOGSPACE-complete for one clock and

NP-hard for two clocks [Laroussinie, Markey, Schnoebelen, 2004]

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SLIDE 27

Reachability in Timed Automata

  • General reachability problem is PSPACE-complete [Alur, Dill

1994]

  • Reachability is PSPACE-complete for 3 clocks, or for an

unbounded number of clocks and constants from {0, 1} [Courcoubetis, Yannakakis, 1992]

  • Reachability is NLOGSPACE-complete for one clock and

NP-hard for two clocks [Laroussinie, Markey, Schnoebelen, 2004]

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SLIDE 28

Reachability in Timed Automata

  • General reachability problem is PSPACE-complete [Alur, Dill

1994]

  • Reachability is PSPACE-complete for 3 clocks, or for an

unbounded number of clocks and constants from {0, 1} [Courcoubetis, Yannakakis, 1992]

  • Reachability is NLOGSPACE-complete for one clock and

NP-hard for two clocks [Laroussinie, Markey, Schnoebelen, 2004]

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SLIDE 29

Reachability in Timed Automata

  • General reachability problem is PSPACE-complete [Alur, Dill

1994]

  • Reachability is PSPACE-complete for 3 clocks, or for an

unbounded number of clocks and constants from {0, 1} [Courcoubetis, Yannakakis, 1992]

  • Reachability is NLOGSPACE-complete for one clock and

NP-hard for two clocks [Laroussinie, Markey, Schnoebelen, 2004]

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SLIDE 30

Reachability in Timed Automata

  • General reachability problem is PSPACE-complete [Alur, Dill

1994]

  • Reachability is PSPACE-complete for 3 clocks, or for an

unbounded number of clocks and constants from {0, 1} [Courcoubetis, Yannakakis, 1992]

  • Reachability is NLOGSPACE-complete for one clock and

NP-hard for two clocks [Laroussinie, Markey, Schnoebelen, 2004]

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SLIDE 31

Counter Automata

  • Comprise a finite-state controller with a finite number of

counters ranging of N

  • Along transitions counters can be incremented, decremented or

tested for zero

  • Constants are encoded in binary
slide-32
SLIDE 32

Counter Automata

  • Comprise a finite-state controller with a finite number of

counters ranging of N

  • Along transitions counters can be incremented, decremented or

tested for zero

  • Constants are encoded in binary
slide-33
SLIDE 33

Counter Automata

  • Comprise a finite-state controller with a finite number of

counters ranging of N

  • Along transitions counters can be incremented, decremented or

tested for zero

  • Constants are encoded in binary
slide-34
SLIDE 34

Counter Automata

  • Comprise a finite-state controller with a finite number of

counters ranging of N

  • Along transitions counters can be incremented, decremented or

tested for zero

  • Constants are encoded in binary
slide-35
SLIDE 35

Counter Automata

  • Comprise a finite-state controller with a finite number of

counters ranging of N

  • Along transitions counters can be incremented, decremented or

tested for zero

  • Constants are encoded in binary
slide-36
SLIDE 36

Counter Automata

  • Comprise a finite-state controller with a finite number of

counters ranging of N

  • Along transitions counters can be incremented, decremented or

tested for zero

  • Constants are encoded in binary
slide-37
SLIDE 37

Counter Automata

  • Comprise a finite-state controller with a finite number of

counters ranging of N

  • Along transitions counters can be incremented, decremented or

tested for zero

  • Constants are encoded in binary
slide-38
SLIDE 38

Reachability in Counter Automata

slide-39
SLIDE 39

Reachability in Counter Automata

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SLIDE 40

Reachability in Counter Automata

1 2 3 4

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SLIDE 41

Reachability in Counter Automata

1 2 3 4

Can we reach (4, c1 → 0, c2 → 0) starting in (1, c1 → 6, c2 → 0)?

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SLIDE 42

Reachability in Counter Automata

1 2 3 4

Can we reach (4, c1 → 0, c2 → 0) starting in (1, c1 → 6, c2 → 0)?

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SLIDE 43

Reachability in Counter Automata

1 2 3 4

Can we reach (4, c1 → 0, c2 → 0) starting in (1, c1 → 6, c2 → 0)? No we cannot!

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SLIDE 44

Reachability in Counter Automata

1 2 3 4

Can we reach (4, c1 → 0, c2 → 0) starting in (1, c1 → 6, c2 → 0)?

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SLIDE 45

Reachability in Counter Automata

1 2 3 4

Can we reach (4, c1 → 0, c2 → 0) starting in (1, c1 → 6, c2 → 0)? (1, c1 → 6, c2 → 0)

slide-46
SLIDE 46

Reachability in Counter Automata

1 2 3 4

Can we reach (4, c1 → 0, c2 → 0) starting in (1, c1 → 6, c2 → 0)? (1, c1 → 6, c2 → 0) → (2, c1 → 6, c2 → 10)

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SLIDE 47

Reachability in Counter Automata

1 2 3 4

Can we reach (4, c1 → 0, c2 → 0) starting in (1, c1 → 6, c2 → 0)? (1, c1 → 6, c2 → 0) → (2, c1 → 6, c2 → 10) → (3, c1 → 6, c2 → 8)

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SLIDE 48

Reachability in Counter Automata

1 2 3 4

Can we reach (4, c1 → 0, c2 → 0) starting in (1, c1 → 6, c2 → 0)? (1, c1 → 6, c2 → 0) → (2, c1 → 6, c2 → 10) → (3, c1 → 6, c2 → 8) → (2, c1 → 5, c2 → 8)

slide-49
SLIDE 49

Reachability in Counter Automata

1 2 3 4

Can we reach (4, c1 → 0, c2 → 0) starting in (1, c1 → 6, c2 → 0)? (1, c1 → 6, c2 → 0) → (2, c1 → 6, c2 → 10) → (3, c1 → 6, c2 → 8) → (2, c1 → 5, c2 → 8) → · · ·

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SLIDE 50

Reachability in Counter Automata

1 2 3 4

Can we reach (4, c1 → 0, c2 → 0) starting in (1, c1 → 6, c2 → 0)? (1, c1 → 6, c2 → 0) → (2, c1 → 6, c2 → 10) → (3, c1 → 6, c2 → 8) → (2, c1 → 5, c2 → 8) → · · · → (2, c1 → 1, c2 → 0)

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SLIDE 51

Reachability in Counter Automata

1 2 3 4

Can we reach (4, c1 → 0, c2 → 0) starting in (1, c1 → 6, c2 → 0)? (1, c1 → 6, c2 → 0) → (2, c1 → 6, c2 → 10) → (3, c1 → 6, c2 → 8) → (2, c1 → 5, c2 → 8) → · · · → (2, c1 → 1, c2 → 0) →

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SLIDE 52

Reachability in Counter Automata

  • Reachability in counter automata is undecidable already for two

counters [Minsky, 1961]

  • Reachability is NP-complete for one counter [H., Kreutzer, O.,

W., 2009]

  • Reachability is NLOGSPACE-complete for one counter with

numbers encoded in unary [Lafourcade, Lugiez, Treinen, 2004]

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SLIDE 53

Reachability in Counter Automata

  • Reachability in counter automata is undecidable already for two

counters [Minsky, 1961]

  • Reachability is NP-complete for one counter [H., Kreutzer, O.,

W., 2009]

  • Reachability is NLOGSPACE-complete for one counter with

numbers encoded in unary [Lafourcade, Lugiez, Treinen, 2004]

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SLIDE 54

Reachability in Counter Automata

  • Reachability in counter automata is undecidable already for two

counters [Minsky, 1961]

  • Reachability is NP-complete for one counter [H., Kreutzer, O.,

W., 2009]

  • Reachability is NLOGSPACE-complete for one counter with

numbers encoded in unary [Lafourcade, Lugiez, Treinen, 2004]

slide-55
SLIDE 55

Reachability in Counter Automata

  • Reachability in counter automata is undecidable already for two

counters [Minsky, 1961]

  • Reachability is NP-complete for one counter [H., Kreutzer, O.,

W., 2009]

  • Reachability is NLOGSPACE-complete for one counter with

numbers encoded in unary [Lafourcade, Lugiez, Treinen, 2004]

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SLIDE 56

This talk: Can we naturally relate reachability problems in timed and counter automata?

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SLIDE 57

This talk: Can we naturally relate reachability problems in timed and counter automata?

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SLIDE 58

Bounded Counter Automata

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SLIDE 59

Bounded Counter Automata

  • Counters are constrained to take values from bounded intervals

from N

  • Zero tests can be discarded
  • Can be viewed as strongly-bounded VASS as defined by

[Memmim, Roucairol, 1980]

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SLIDE 60

Bounded Counter Automata

  • Counters are constrained to take values from bounded intervals

from N

  • Zero tests can be discarded
  • Can be viewed as strongly-bounded VASS as defined by

[Memmim, Roucairol, 1980]

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SLIDE 61

Bounded Counter Automata

  • Counters are constrained to take values from bounded intervals

from N

  • Zero tests can be discarded
  • Can be viewed as strongly-bounded VASS as defined by

[Memmim, Roucairol, 1980]

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SLIDE 62

Bounded Counter Automata

  • Reachability is trivially decidable and in PSPACE
  • Reachability with one counter is NP-hard and in PSPACE

[Bouyer et al., 2008]

  • Reachability with one counter inter-reducible with model

considered by Demri and Gascon where counter ranges over Z and sign tests are allowed

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SLIDE 63

Bounded Counter Automata

  • Reachability is trivially decidable and in PSPACE
  • Reachability with one counter is NP-hard and in PSPACE

[Bouyer et al., 2008]

  • Reachability with one counter inter-reducible with model

considered by Demri and Gascon where counter ranges over Z and sign tests are allowed

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SLIDE 64

Bounded Counter Automata

  • Reachability is trivially decidable and in PSPACE
  • Reachability with one counter is NP-hard and in PSPACE

[Bouyer et al., 2008]

  • Reachability with one counter inter-reducible with model

considered by Demri and Gascon where counter ranges over Z and sign tests are allowed

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SLIDE 65

Bounded Counter Automata

  • Reachability is trivially decidable and in PSPACE
  • Reachability with one counter is NP-hard and in PSPACE

[Bouyer et al., 2008]

  • Reachability with one counter inter-reducible with model

considered by Demri and Gascon where counter ranges over Z and sign tests are allowed

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SLIDE 66

Remainder of this talk

Relating Reachability in Timed and Bounded Counter Automata with respect to logspace reductions:

  • Reach. in n-clock TA, n ≥ 3

⇐ ⇒

  • Reach. in bounded 2-CA
  • Reach. in 2-clock TA

⇐ ⇒

  • Reach. in bounded 1-CA
  • Reach. in 1-clock TA

⇐ ⇒

  • Reach. in bounded 0-CA
slide-67
SLIDE 67

Remainder of this talk

Relating Reachability in Timed and Bounded Counter Automata with respect to logspace reductions:

  • Reach. in n-clock TA, n ≥ 3

⇐ ⇒

  • Reach. in bounded 2-CA
  • Reach. in 2-clock TA

⇐ ⇒

  • Reach. in bounded 1-CA
  • Reach. in 1-clock TA

⇐ ⇒

  • Reach. in bounded 0-CA
slide-68
SLIDE 68

Remainder of this talk

Relating Reachability in Timed and Bounded Counter Automata with respect to logspace reductions:

  • Reach. in n-clock TA, n ≥ 3

⇐ ⇒

  • Reach. in bounded 2-CA
  • Reach. in 2-clock TA

⇐ ⇒

  • Reach. in bounded 1-CA
  • Reach. in 1-clock TA

⇐ ⇒

  • Reach. in bounded 0-CA
slide-69
SLIDE 69

Remainder of this talk

Relating Reachability in Timed and Bounded Counter Automata with respect to logspace reductions:

  • Reach. in n-clock TA, n ≥ 3

⇐ ⇒

  • Reach. in bounded 2-CA
  • Reach. in 2-clock TA

⇐ ⇒

  • Reach. in bounded 1-CA
  • Reach. in 1-clock TA

⇐ ⇒

  • Reach. in bounded 0-CA
slide-70
SLIDE 70

Remainder of this talk

Relating Reachability in Timed and Bounded Counter Automata with respect to logspace reductions:

  • Reach. in n-clock TA, n ≥ 3

⇐ ⇒

  • Reach. in bounded 2-CA
  • Reach. in 2-clock TA

⇐ ⇒

  • Reach. in bounded 1-CA
  • Reach. in 1-clock TA

⇐ ⇒

  • Reach. in bounded 0-CA
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SLIDE 71

Bounded Two-Counter Automata and n-Clock Timed Automata

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SLIDE 72

Bounded Two-Counter Automata and n-Clock Timed Automata

bounded n-counter automata ⇓ bounded two-counter automata ⇓ n-clock timed automata, n ≥ 3 ⇓ bounded (2n + 2)-counter automata

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SLIDE 73

Bounded Two-Counter Automata and n-Clock Timed Automata

bounded n-counter automata ⇓ bounded two-counter automata ⇓ n-clock timed automata, n ≥ 3 ⇓ bounded (2n + 2)-counter automata

slide-74
SLIDE 74
slide-75
SLIDE 75

make bounds equal

slide-76
SLIDE 76

make bounds equal

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SLIDE 77

make bounds equal

slide-78
SLIDE 78

make bounds equal

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SLIDE 79
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SLIDE 80

encode additional counters into second counter

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SLIDE 81

encode additional counters into second counter

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SLIDE 82

encode additional counters into second counter

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SLIDE 83

“reserve” temporary storage on first counter

slide-84
SLIDE 84
slide-85
SLIDE 85

move “higher” counter values to temporary storage

slide-86
SLIDE 86

block “upper” bits and simulate operation

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SLIDE 87

move temporarily stored counters back

slide-88
SLIDE 88

Bounded Two-Counter Automata and n-Clock Timed Automata

bounded n-counter automata ⇓ bounded two-counter automata ⇓ n-clock timed automata, n ≥ 3 ⇓ bounded (2n + 2)-counter automata

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SLIDE 89

Bounded Two-Counter Automata and n-Clock Timed Automata

bounded n-counter automata ⇓ bounded two-counter automata ⇓ n-clock timed automata, n ≥ 3 ⇓ bounded (2n + 2)-counter automata

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SLIDE 90

Simulating Bounded Two-Counter Automata with Timed Automata

Main idea:

  • Assume uniform bound b on two counters
  • Store values of counters in difference of clock values
  • If x = b then x − y represents value of the first counter and

x − z the value of the second counter

  • Replace in- and decrements by gadgets
slide-91
SLIDE 91

Simulating Bounded Two-Counter Automata with Timed Automata

Main idea:

  • Assume uniform bound b on two counters
  • Store values of counters in difference of clock values
  • If x = b then x − y represents value of the first counter and

x − z the value of the second counter

  • Replace in- and decrements by gadgets
slide-92
SLIDE 92

Simulating Bounded Two-Counter Automata with Timed Automata

Main idea:

  • Assume uniform bound b on two counters
  • Store values of counters in difference of clock values
  • If x = b then x − y represents value of the first counter and

x − z the value of the second counter

  • Replace in- and decrements by gadgets
slide-93
SLIDE 93

Simulating Bounded Two-Counter Automata with Timed Automata

Main idea:

  • Assume uniform bound b on two counters
  • Store values of counters in difference of clock values
  • If x = b then x − y represents value of the first counter and

x − z the value of the second counter

  • Replace in- and decrements by gadgets
slide-94
SLIDE 94

Simulating Bounded Two-Counter Automata with Timed Automata

Main idea:

  • Assume uniform bound b on two counters
  • Store values of counters in difference of clock values
  • If x = b then x − y represents value of the first counter and

x − z the value of the second counter

  • Replace in- and decrements by gadgets
slide-95
SLIDE 95

Simulating Bounded Two-Counter Automata with Timed Automata

slide-96
SLIDE 96

Simulating Bounded Two-Counter Automata with Timed Automata

slide-97
SLIDE 97

Bounded Two-Counter Automata and n-Clock Timed Automata

bounded n-counter automata ⇓ bounded two-counter automata ⇓ n-clock timed automata, n ≥ 3 ⇓ bounded (2n + 2)-counter automata

slide-98
SLIDE 98

Bounded Two-Counter Automata and n-Clock Timed Automata

bounded n-counter automata ⇓ bounded two-counter automata ⇓ n-clock timed automata, n ≥ 3 ⇓ bounded (2n + 2)-counter automata

slide-99
SLIDE 99

Simulating n-Clock Timed Automata with Bounded Counter Automata

  • Main idea: simulate region abstraction on the counters
slide-100
SLIDE 100

Simulating n-Clock Timed Automata with Bounded Counter Automata

  • Main idea: simulate region abstraction on the counters
slide-101
SLIDE 101

Simulating n-Clock Timed Automata with Bounded Counter Automata

  • Main idea: simulate region abstraction on the counters
  • Region abstraction treats two configurations as equivalent if

(a) their control locations are the same (b) the integral parts of each clock with a value below the maximum constant are the same (c) the relative orders of the fractional parts of the values of the clocks are the same (d) the clocks with fractional part 0 are the same

slide-102
SLIDE 102

Simulating n-Clock Timed Automata with Bounded Counter Automata

  • Main idea: simulate region abstraction on the counters
  • Region abstraction treats two configurations as equivalent if

(a) their control locations are the same (b) the integral parts of each clock with a value below the maximum constant are the same (c) the relative orders of the fractional parts of the values of the clocks are the same (d) the clocks with fractional part 0 are the same

slide-103
SLIDE 103

Simulating n-Clock Timed Automata with Bounded Counter Automata

  • Main idea: simulate region abstraction on the counters
  • Region abstraction treats two configurations as equivalent if

(a) their control locations are the same (b) the integral parts of each clock with a value below the maximum constant are the same (c) the relative orders of the fractional parts of the values of the clocks are the same (d) the clocks with fractional part 0 are the same

slide-104
SLIDE 104

Simulating n-Clock Timed Automata with Bounded Counter Automata

  • Main idea: simulate region abstraction on the counters
  • Region abstraction treats two configurations as equivalent if

(a) their control locations are the same (b) the integral parts of each clock with a value below the maximum constant are the same (c) the relative orders of the fractional parts of the values of the clocks are the same (d) the clocks with fractional part 0 are the same

slide-105
SLIDE 105

Simulating n-Clock Timed Automata with Bounded Counter Automata

  • Main idea: simulate region abstraction on the counters
  • Region abstraction treats two configurations as equivalent if

(a) their control locations are the same (b) the integral parts of each clock with a value below the maximum constant are the same (c) the relative orders of the fractional parts of the values of the clocks are the same (d) the clocks with fractional part 0 are the same

slide-106
SLIDE 106

Simulating n-Clock Timed Automata with Bounded Counter Automata

... ... ... ... ...

1 1 1 1 1 1 1 1 relative order of clocks integral part of clocks

...

slide-107
SLIDE 107

Simulating n-Clock Timed Automata with Bounded Counter Automata

... ... ... ... ...

1 1 1 1 1 1 1 1 relative order of clocks integral part of clocks

...

elapse of time

slide-108
SLIDE 108

Simulating n-Clock Timed Automata with Bounded Counter Automata

... ... ... ... ...

1 1 1 1 1 1 1 1 relative order of clocks integral part of clocks

...

elapse of time

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SLIDE 109

Simulating n-Clock Timed Automata with Bounded Counter Automata

... ... ... ... ...

1 1 1 1 1 1 1 1 relative order of clocks integral part of clocks

...

elapse of time

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SLIDE 110

Simulating n-Clock Timed Automata with Bounded Counter Automata

... ... ... ... ...

1 1 1 1 1 1 1 1 relative order of clocks integral part of clocks

...

elapse of time

slide-111
SLIDE 111

Simulating n-Clock Timed Automata with Bounded Counter Automata

... ... ... ... ...

1 1 1 1 1 1 1 1 relative order of clocks integral part of clocks

...

elapse of time

slide-112
SLIDE 112

Simulating n-Clock Timed Automata with Bounded Counter Automata

... ... ... ... ...

1 1 1 1 1 1 1 relative order of clocks integral part of clocks

...

elapse of time

slide-113
SLIDE 113

Simulating n-Clock Timed Automata with Bounded Counter Automata

... ... ... ... ...

1 1 1 1 1 1 1 relative order of clocks integral part of clocks

...

elapse of time

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SLIDE 114

Simulating n-Clock Timed Automata with Bounded Counter Automata

... ... ... ... ...

1 1 1 1 1 1 1 relative order of clocks integral part of clocks

...

clock reset analogously

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SLIDE 115

Theorem Reachability in k-clock timed automata with k ≥ 3 is logarithmic- space inter-reducible with reachability in bounded two-counter automata.

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SLIDE 116

Theorem Reachability in k-clock timed automata with k ≥ 3 is logarithmic- space inter-reducible with reachability in bounded two-counter automata. Corollary Reachability in bounded k-counter automata is PSPACE-complete for k ≥ 2.

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SLIDE 117

Bounded One-Counter Automata and Two-Clock Timed Automata

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SLIDE 118

Two-Clock Timed Automata to Bounded One-Counter Automata

Given a timed automaton with x-constants {0, 1, 5} and y-constants {0, 1, 3}

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SLIDE 119

Two-Clock Timed Automata to Bounded One-Counter Automata

Given a timed automaton with x-constants {0, 1, 5} and y-constants {0, 1, 3}

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SLIDE 120

Two-Clock Timed Automata to Bounded One-Counter Automata

Given a timed automaton with x-constants {0, 1, 5} and y-constants {0, 1, 3} regions of the automaton

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SLIDE 121

Two-Clock Timed Automata to Bounded One-Counter Automata

Given a timed automaton with x-constants {0, 1, 5} and y-constants {0, 1, 3}

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SLIDE 122

Two-Clock Timed Automata to Bounded One-Counter Automata

Given a timed automaton with x-constants {0, 1, 5} and y-constants {0, 1, 3} regions and clock difference zones of the automaton

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SLIDE 123

Two-Clock Timed Automata to Bounded One-Counter Automata

Elapse of time x ∈ (2, 3), y ∈ [0, 0]

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SLIDE 124

Two-Clock Timed Automata to Bounded One-Counter Automata

Elapse of time x ∈ (2, 3), y ∈ (0, 1)

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SLIDE 125

Two-Clock Timed Automata to Bounded One-Counter Automata

Elapse of time x ∈ (2, 3), y ∈ [1, 1]

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SLIDE 126

Two-Clock Timed Automata to Bounded One-Counter Automata

Regions and clock difference zones are too coarse to fully capture reachability properties

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SLIDE 127

Two-Clock Timed Automata to Bounded One-Counter Automata

Regions and clock difference zones are too coarse to fully capture reachability properties

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SLIDE 128

Two-Clock Timed Automata to Bounded One-Counter Automata

Regions and clock difference zones are too coarse to fully capture reachability properties

slide-129
SLIDE 129

Two-Clock Timed Automata to Bounded One-Counter Automata

Regions and clock difference zones are too coarse to fully capture reachability properties

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SLIDE 130

Two-Clock Timed Automata to Bounded One-Counter Automata

Regions and clock difference zones are too coarse to fully capture reachability properties use counter in order to store difference between x and y

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SLIDE 131

Two-Clock Timed Automata to Bounded One-Counter Automata

Counter encodes the difference between clocks when it is an integral value...

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SLIDE 132

Two-Clock Timed Automata to Bounded One-Counter Automata

...and two consecutive integers if the difference between clocks lies in between those integral values

slide-133
SLIDE 133

Two-Clock Timed Automata to Bounded One-Counter Automata

Suppose we wish to reset clock y only

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SLIDE 134

Two-Clock Timed Automata to Bounded One-Counter Automata

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SLIDE 135

Two-Clock Timed Automata to Bounded One-Counter Automata

  • Resulting counter must be smaller than z + yu
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SLIDE 136

Two-Clock Timed Automata to Bounded One-Counter Automata

  • Resulting counter must be smaller than z + yu
  • Resulting counter must be above xl
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SLIDE 137

Two-Clock Timed Automata to Bounded One-Counter Automata

  • Resulting counter must be smaller than z + yu
  • Resulting counter must be above xl
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SLIDE 138

Two-Clock Timed Automata to Bounded One-Counter Automata

  • Resulting counter must be smaller than z + yu
  • Resulting counter must be above xl

add yu to the counter, non-deterministically decrement counter and then check it is greater than xl

slide-139
SLIDE 139

Two-Clock Timed Automata to Bounded One-Counter Automata

slide-140
SLIDE 140

Two-Clock Timed Automata to Bounded One-Counter Automata

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SLIDE 141

Two-Clock Timed Automata to Bounded One-Counter Automata

  • counter must be below n + yu
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SLIDE 142

Two-Clock Timed Automata to Bounded One-Counter Automata

  • counter must be below n + yu
  • counter must be above n + yl
slide-143
SLIDE 143

Two-Clock Timed Automata to Bounded One-Counter Automata

  • counter must be below n + yu
  • counter must be above n + yl
slide-144
SLIDE 144

Two-Clock Timed Automata to Bounded One-Counter Automata

  • counter must be below n + yu
  • counter must be above n + yl

add value from the interval [yl, yu] to the counter (requires gadget)

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SLIDE 145

Two-Clock Timed Automata to Bounded One-Counter Automata

slide-146
SLIDE 146

Two-Clock Timed Automata to Bounded One-Counter Automata

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SLIDE 147

Two-Clock Timed Automata to Bounded One-Counter Automata

  • counter must be below yl
  • counter must be above yl
slide-148
SLIDE 148

Two-Clock Timed Automata to Bounded One-Counter Automata

  • counter must be below yl
  • counter must be above yl
slide-149
SLIDE 149

Two-Clock Timed Automata to Bounded One-Counter Automata

  • counter must be below yl
  • counter must be above yl
slide-150
SLIDE 150

Two-Clock Timed Automata to Bounded One-Counter Automata

  • counter must be below yl
  • counter must be above yl

connect to a gadget which non-deterministically decrements the counter and then verifies that it is in (−yu, −yl)

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SLIDE 151

Two-Clock Timed Automata to Bounded One-Counter Automata

Remaining polynomially many cases follow analogously

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SLIDE 152

Bounded One-Counter Automata to Two-Clock Timed Automata to

  • Other direction follows straightforwardly by encoding counter as

the difference of two clocks, similar to the case with two counters

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SLIDE 153

Bounded One-Counter Automata to Two-Clock Timed Automata to

  • Other direction follows straightforwardly by encoding counter as

the difference of two clocks, similar to the case with two counters Theorem Reachability in two-clock timed automata is logarithmic-space inter-reducible with reachability in bounded one-counter automata.

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SLIDE 154

Answering the Pólya Question

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SLIDE 155

George Pólya (1887-1985)

“If there is a problem you can’t solve, then there is an easier problem you can solve: find it.”

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SLIDE 156

One control location, one self-loop

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SLIDE 157

One control location, one self-loop

Reachability is NP-hard if the number of edges is unbounded and numbers are encoded in binary

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SLIDE 158

One control location, one self-loop

Given a bound and a target, reachability is clearly decidable in polynomial time

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SLIDE 159

One control location, one self-loop

Given a bound and a target, reachability is clearly decidable in polynomial time √

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SLIDE 160

One control location, two self-loops

Given a bound a target and the Parikh image of a reaching run, reachability is decidable in polynomial time

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SLIDE 161

One control location, two self-loops

Given a bound a target and the Parikh image of a reaching run, reachability is decidable in polynomial time √

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SLIDE 162

Reachability via Lattice Paths

Idea: transform the reachability question into a question about the existence of lattice path in a convex polygon

slide-163
SLIDE 163

Reachability via Lattice Paths

slide-164
SLIDE 164

Reachability via Lattice Paths

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SLIDE 165

Reachability via Lattice Paths

We get stuck since bound is too tight

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SLIDE 166

Reachability via Lattice Paths

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SLIDE 167

Reachability via Lattice Paths

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SLIDE 168

Reachability via Lattice Paths

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SLIDE 169

Reachability via Lattice Paths

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SLIDE 170

Reachability via Lattice Paths

There exists a lattice path reaching a particular point (x, y) if, and

  • nly if, the number of lattice points in the polygon is at least

x + y + 1

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SLIDE 171

Implications for Two-Clock Timed Automata

Bézout automaton introduced in [Naves, 2006]

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SLIDE 172

Implications for Two-Clock Timed Automata

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SLIDE 173

One control location, three self-loops

Let the bound be 20 and the target be 12

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SLIDE 174

One control location, three self-loops

Let the bound be 20 and the target be 12 Example of a reaching run where red=7, green=-11 and blue=17

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SLIDE 175

Conclusion

This talk showed

  • a relationship between reachability problems in timed and

bounded counter automata with respect to the resources available

  • equivalence between two major problems that have been

stated as open

  • a simple class of bounded one-counter automata for which

reachability is open

slide-176
SLIDE 176

Conclusion

This talk showed

  • a relationship between reachability problems in timed and

bounded counter automata with respect to the resources available

  • equivalence between two major problems that have been

stated as open

  • a simple class of bounded one-counter automata for which

reachability is open

slide-177
SLIDE 177

Conclusion

This talk showed

  • a relationship between reachability problems in timed and

bounded counter automata with respect to the resources available

  • equivalence between two major problems that have been

stated as open

  • a simple class of bounded one-counter automata for which

reachability is open

slide-178
SLIDE 178

Conclusion

This talk showed

  • a relationship between reachability problems in timed and

bounded counter automata with respect to the resources available

  • equivalence between two major problems that have been

stated as open

  • a simple class of bounded one-counter automata for which

reachability is open