A Pulse-Driven LC-VCO with a Figure-of-Merit of -192dBc/Hz Aravind - - PowerPoint PPT Presentation

A Pulse-Driven LC-VCO with a Figure-of-Merit of -192dBc/Hz

Aravind Tharayil Narayanan, Kento Kimura, Wei Deng, Kenichi Okada, and Akira Matsuzawa

Matsuzawa & Okada Lab.

b.

y

Matsuzawa & Okada Lab.

b.

y

Tokyo Institute of Technology, Japan

1

Contents

u Motivation u Tackling Efficiency: Class-C VCO u Efficiency and MOS Sizing u Effects of Large MOS u AM-PM Conversion Phenomenon u Pulse Drive Technique u Proposed VCO u Simulation and Measurement Results u Conclusion

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Motivation

VCO for next generation wireless devices

Low power TRx is required for next gen portable devices u High purity u High efficiency VCO – A major power consumer in TRx.

[1] H. Darabi, JSSC 2011.

RX 62% VCO 38% u Small area 30mA 19mA

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VDS VTH VDD IDS IDS ϖ

• ϖ

ϖ

• ϖ

2 2

−Φ Φ

VP VN M1 M2 Vgbias VDD CTail IB 2 π IB ≈IB ≈ Class-B Class-C

Tackling Efficiency: Class-C VCO

Ø High current efficiency

[2] A. Mazzanti and P. Andreani, JSSC 2008.

4

!!"# = !!! − (!!" − !!") !

Efficiency and MOS sizing

[2] A. Mazzanti and P. Andreani, JSSC 2008.

Ø Large MOS required for better efficiency

VDS VDD VTH IDS1 Imax1 Imax2 IDS2 ϖ

• ϖ

ϖ

• ϖ

2 2

−Φ2 −Φ2

VGS Small MOS Large MOS

−Φ1 Φ1

For high efficiency Ø Large Amax Ø Small VGS Ø Small conduction angle

5

VP VN M1 M2 Cgs,M1 Cgs,M2 Vgbias VDD Behavior of Cgs Cgs VTail CTail CGS CL CH CT VGS VTH VDS+TH

Effects of Large MOS

Ø Tank capacitance is susceptive to VGS variations. (cut-off) (saturation)

6 VP VN VDD Time Domain Analysis CGS Bias

• R

t t

VDS VGS f V δf ϖ

• ϖ

2ϖ

• 2ϖ

VTH VDD CGS CH CT CL VGS ∆C2 ∆C1 CGS f0-Δf2 f0-Δf1 ∆VGS2 ∆VGS1

AM-PM Conversion in Class-C VCO

Ø Variations in CGS translates to phase noise.

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AM-PM conversion- Contd.

Ø Smaller Φ with smaller transistor size.

• 0.3

0.0 0.3 simulaon with AM-PM without AM-PM 0.6

• 115
• 110
• 105
• 100

Phase Noise [dBc/Hz] Vgbias[V]

• 95
• 90

Small Φ Large AM-PM

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Issue of Class-C VCO

t VDD IDS VGS VDS VTH Vgbias V t

ϖ

• ϖ

ϖ

• ϖ

2 2 ϖ

• ϖ

ϖ

• ϖ

2 2

VGS-VTH must be small for small Φ Ø Smaller Φ with smaller transistor size. Large MOS is required for larger current

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t VDS VGS VTH VDD VSS V t VDD IDS VGS VDS VTH Vgbias V

ϖ

• ϖ

ϖ

• ϖ

2 2

t IDS

ϖ

• ϖ

ϖ

• ϖ

2 2

t

ϖ

• ϖ

ϖ

• ϖ

2 2

Proposed Pulse-Driven VCO

Conduction angle is independent of MOS size.

10 VP VN VDD

Time Domain Analysis

CGS

Pulse Drive

• R

CGS CH CT CL VGS

t t

VDS VGS VTH VDD CGS V f f0

t

ϖ

• ϖ

2ϖ

• 2ϖ

CL CT ∆VGS2 ∆VGS1 f0-Δf f0-Δf

Analysis: AM-PM Conversion

AM-PM translation is minimized.

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Proposed Circuit Schematic

VDD IB M1 M2 MTail CTail conduction angle control Amplitude regenerator VP VTail VN Cb Rb VDD IB Cb Rb VDD Vbp Vbn

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θ

ϖ

• Cond. Angle

Control Amplitude Regeneration

Class-AB Class-B Induced Class-C

IB Sense Cb Rb Mb NB Vbp Vp Vbp VDD ATank VTH VDD VDD VInit V(NB) θ

t

ϖ

Pulse Drive: Startup

High robustness

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θ

ϖ

• Cond. Angle

Control Amplitude Regeneration

Class-AB Class-B Induced Class-C

IB Sense Cb Rb Mb NB Vbp Vp Vbp VDD ATank VTH VDD VDD VInit V(NB) θ

t

ϖ

Pulse Drive: Startup Contd.

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θ

ϖ

• Cond. Angle

Control Amplitude Regeneration

Class-AB Class-B Induced Class-C

IB Sense Cb Rb Mb NB Vbp Vp Vbp VDD ATank VTH VDD VDD VInit V(NB) θ

t

ϖ

Pulse Drive: Steady State

High Efficiency

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Noise from the additional MOS

Delay introduced by the inverter is within safe ISF region. Delay becomes trivial in advanced processes.

VDD VDD CP CCC VP VN LP CP LP Pulse Generator

τ

VDS IDS ISF T1

τ

ϖ

• ϖ

2ϖ

• 2ϖ

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Noise Contribution

Noise introduced by the driver circuitry is small.

Components Noise Contribution (%)

10 20 30 40 MCC Tank MTAIL RBIAS MBIAS Misc.

MCC MCC N1 N2 P_Drive P_Drive VTail VP Tank VN MTail CTail MBIAS

IB Cb RBIAS Mb N1 Vp VDD

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Chip Micrograph

Proposed

Vgbias M1 M2 VP VTail CTail VN VDD M1 M2 VP Pulse Drive Pulse Drive VTail CTail VN VDD

Reference VCO Pulse Drive

62 45

250 500 250 500

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Measurement Results

• 50
• 60
• 70
• 80
• 90
• 100
• 110
• 120
• 130
• 140
• 150

1k 10k 100k 1M 10M Reference VCO Pdc = 2.54mW FoM = -190dBc/Hz This work Pdc = 2.05mW FoM = -192dBc/Hz

Offset Frequency [Hz] Phase Noise [dBc/Hz]

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Performance Comparison

CMOS Process Frequency [GHz] Phase Noise [dBc/Hz] Pdc [mW] FoM [dBc/Hz]

[1] JSSC2008 130nm 4.9

• 130@1MHz

1.30

• 196

[2] VLSI2009 180nm 4.5

• 109@1MHz

0.16

• 190

[3] JSSC2013 180nm 4.84

• 125@1MHz

3.40

• 193

[4] ESSCIRC2011 90nm 5.1

• 120@1MHz

0.86

• 192

[5] JSSC2013 65nm 3.7

• 142@3MHz

15.0

• 192

[6] JSSC2013 65nm 4.8

• 144@10Mhz

4.00

• 191

This Work 180nm 3.6

• 124@1MHz

2.05

• 192

[1] A. Mazzanti and P. Andreani, JSSC 2008. [2] K. Okada et al., VLSI 2009. [3] W. Deng et al., JSSC 2013. [4] M. Tohidian et al., ESSCIRC 2011. [5] M. Babaie et al., JSSC 2013. [6] L. Fanori et al., JSSC 2008

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Conclusion

Ø A phenomenon in class-C VCO due to which AM noise is up-converted to PN is identified. Ø A new technique namely “pulse-drive” is proposed to alleviate AM-PM conversion issue. Ø The proposed pulse-drive technique avoids AM-PM conversion without sacrificing efficiency. Ø A VCO is implemented using the proposed pulse- drive technique and tested to verify the claims. Ø The proposed circuit is however process dependent and has limited frequency of operation.

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Simulated Waveforms (1)

• 1.E-03

0.E+00 1.E-03 2.E-03 3.E-03 4.E-03 5.E-03 6.E-03 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 3.85E-07 3.85E-07 3.85E-07 3.85E-07 3.85E-07 Current (A) Voltage (V) Time (s)

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Simulated Waveforms (2)