1 What an odd little circuit Bistable latches o Memories Q Q o - - PDF document

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1 What an odd little circuit Bistable latches o Memories Q Q o - - PDF document

Clocks Latches and Flip-flops o A clock is a free-running signal with a fixed cycle time. Fundamental elements of memory o Clock frequency is the inverse of its cycle time. Falling edge Rising edge CS240 Computer Organization Clock period


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CS240 Computer Organization Department of Computer Science Wellesley College

Latches and Flip-flops

Fundamental elements of memory

Clocks

  • A clock is a free-running signal

with a fixed cycle time.

  • Clock frequency is the inverse
  • f its cycle time.
  • Clocks are needed in sequential

logic to decide when to update an element’s state.

Clock period Falling edge Rising edge

Flip-flops 15-2

Synchronous systems

  • The signals that are written into state elements must be

valid when the active clock edge occurs.

State element 1 State element 2 Combinational logic

Flip-flops 15-3

Reading and writing in the same cycle

  • An edge-triggered methodology allows a state element to

be read and written in the same clock cycle.

State element 1 Combinational logic

15-4 Flip-flops

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What an odd little circuit

15-5 Flip-flops

Bistable latches

  • Memories
  • New memories

Q Q Q Q R S

15-6 Flip-flops

Redrawing the SR latch

Q S R Q Q Q R S

  • New
  • Old

15-7 Flip-flops

A D latch

  • When the clock is unasserted, the cross-coupled pair of

NOR gates acts to store the state value.

  • When the clock goes high, the Q value tracks the value
  • f D.

Q D C Q

15-8 Flip-flops

R S

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A D flip-flop with a falling-edge trigger

Q D C D latch Q D C D latch Q D C Q Q

15-9 Flip-flops

E

One D Flip-Flop* = One Bit

Q D C D Flip-Flop Q

*Block diagram. 1

15-10 Flip-flops

Dual D flip-flop

15-11 Flip-flops

One Nibble*

Q D C D Flip-Flop Q

*Half a byte!

Q D C D Flip-Flop Q Q D C D Flip-Flop Q Q D C D Flip-Flop Q Write Clock

1 1

15-12 Flip-flops

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Register files

  • A register file consists of

a set of registers that can be read and written by supplying a register number.

  • Register files with two

read ports will be important later in the semester when we build

  • ur MIPS machine.

15-13 Flip-flops

Implementation of two read ports

15-14 Flip-flops

Implementation of write port

15-15 Flip-flops

Synthesis of sequential circuits

  • The output of

combinational circuits depends only on their current input.

  • Sequential circuits

“selectively” remember past events.

  • They speak of such

circuits as having state and model them with finite automata.

15-16 Flip-flops

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Identify the required internal states*

Open Closed

*And use input signals to generate transition diagram.

15-17 Flip-flops

Identify the required internal states*

Open Closed

*And use input signals to generate transition diagram. 10 00 00 01 11 01 10 11

  • utside

signal inside signal

15-18 Flip-flops

Determine required memory*

*Assign codes to states and produce state and output tables.

State code Out In 0 0 Closed 0 Open 1 Out In 0 1 Out In 1 0 Out In 1 1 1 1 1 1

15-19 Flip-flops

Select flip-flops and develop control levels

Q D C D Flip-flop Q Output signal Outside Inside

15-20 Flip-flops

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Develop control level table(s)

*These are the inputs to the flip-flops that make them behave according to the transition diagram and table. State Out In D

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

15-21 Flip-flops

Develop Boolean expression for D

D = State’ • Out • In’ + State • Out’ • In + State • Out • In’ + State • Out • In State Out In D

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

15-22 Flip-flops

Implement circuit

Q D C D Flip-flop Q Output signal Outside Inside

15-23 Flip-flops