Computer Science II (Summer Semester 2003) Prof. Dr. Dieter Hogrefe - - PowerPoint PPT Presentation

Telematics group

University of Göttingen, Germany

Computer Science II

(Summer Semester 2003)

• Prof. Dr. Dieter Hogrefe
• Dr. Xiaoming Fu

Kevin Scott, M.A.

Telematics group

University of Göttingen, Germany

Computer Science II Part I: Digital Logic and Boolean Algebra

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SS 2003 Computer Science II

Table of Content

• Digital Number Systems
• Logic Gates
• Boolean Algebra
• Karnaugh Maps
• Applications: Addition and multiplication
• Flip-Flops

Credits:

• Howard Huang, UIUC

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Digital Number System

• Decimal System

– consists of 10 symbols: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 – using these symbols as digits of a number, we can express any quantity. – The decimal system is also called the base-10 system because it has 10 digits.

Decimal point . Least Significant Digit Most Significant Digit =0.01 =0.1 =1 =10 =100 =1000 10-2 10-1 100 101 102 103

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Digital Number System (cont.)

• Binary System:

– In the binary system, there are only two symbols or possible digit values, 0 and 1. – This base-2 system can be used to represent any quantity that can be represented in decimal or other number system.

Binary point . Least Significant Bit Most Significant Bit =1/4 =1/2 =1 =2 =4 =8 2-2 2-1 20 21 22 23

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The Binary counting sequence is shown in the following table:

Binary Counting

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Representing Binary Quantities

• In digital systems the information is presented in binary form. Binary quantities

can be represented by any device that has only two operating states or possible conditions.

• Eg. a switch has only open or closed. By assigning it with binary 0 (open) and 1

(closed), we can represent any binary number by using series of switches.

• Typical Voltage Assignment

– Binary 1: Any voltage between 2V to 5V – Binary 0: Any voltage between 0V to 0.8V – Not used: Voltage between 0.8V to 2V, this may cause error in a digital circuit.

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Number Systems and Codes

• Decimal (base-10): universial used to

represent quantites outside a digital system

• Binary (base-2): most important in digital

systems, but it is too long to express

• Thus, other systems were introduced:

– octal (base-8) – hexadecimal (base-16)

• How can one convert from one number

system to another??

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Binary-To-Decimal Conversion

• Method: find the weights (i.e., power of 2) of

the various positions in the binary number which contain a 1, and add them up. Example:

1 1 0 1 1 2 (binary) 24+23+0+21+20 = 16+8+0+2+1= 2710 (decimal)

• 1 0 1 1 0 1 0 1 2 (binary)

27+0+25+24+0+22+0+20 =128+0+32+16+0+4+0+1 = 18110 (decimal)

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Decimal-To-Binary Conversion

• (A) Revese of Binary-To-Digital Method

45 10 = 32 + 0 + 8 + 4 +0 + 1 = 25+0+23+22+0+20 = 1 0 1 1 0 12

• (B) Repeat Division

This method uses repeated division by 2. Eg. convert 2510 to binary

Г

• Г

Г Г Г

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Octal Number System

• The octal number system has a base of eight,

meaning that it has eight possible digits: 0,1,2,3,4,5,6,7.

• Octal to Decimal Conversion
• eg. 24.68 = 2 x (81) + 4 x (80) + 6 x (8-1) = 20.7510

Octal point . Least Significant Digit Most Significant Digit =1/512 =1/8 =1 =8 =64 =512 8-2 8-1 80 81 82 83

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Binary-To-Octal / Octal-To-Binary Conversion

Octal Digit 0 1 2 3 4 5 6 7 Binary Equivalent 000 001 010 011 100 101 110 111 Each Octal digit is represented by three bits of binary digit.

• eg. 100 111 0102 = (100) (111) (010)2 = 4 7 28

Repeat Division

This method uses repeated division by 8.

• Eg. convert 17710 to octal and binary:

Г

• Г

Г

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Hexadecimal Number System

• The hexadecimal system uses base 16. Thus, it has

16 possible digit symbols. It uses the digits 0 through 9 plus the letters A, B, C, D, E, and F as the 16 digit symbols.

Hexa- decimal point . Least Significant Digit Most Significant Digit =1/4096 =1/16 =1 =16 =256 =4096 16-2 16-1 160 161 162 163

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Hexadecimal to Decimal Conversion

• eg. 2AF16 = 2 x (162) + 10 x (161) + 15 x (160) = 68710

Repeat Division: Convert decimal to hexadecimal

This method uses repeated division by 16.

• Eg. convert 37810 to hexadecimal and binary:

Г

• Г

Г

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Other Conversions

• Binary-To-Hexadecimal / Hexadecimal-To-Binary Conversion

Hexadecimal Digit 0 1 2 3 4 5 6 7 Binary Equivalent 0000 0001 0010 0011 0100 0101 0110 0111 Hexadecimal Digit 8 9 A B C D E F Binary Equivalent 1000 1001 1010 1011 1100 1101 1110 1111 Each Hexadecimal digit is represented by four bits of binary digit.

• eg. 1011 0010 11112 = (1011) (0010) (1111)2 = B 2 F16
• Octal-To-Hexadecimal / Hexadecimal-To-Octal Conversion

1) Convert Octal (Hexadecimal) to Binary first. 2a) Regroup the binary number in 3 bits a group starts from the LSB if Octal is required. 2b) Regroup the binary number in 4 bits a group from the LSB if Hexadecimal is required.

• eg. Convert 5A816 to Octal:

5A816 = 0101 1010 1000 (Binary) = 2 6 5 0 (Octal)

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Table of Content

• Digital Number Systems
• Logic Gates
• Boolean Algebra
• Karnaugh Maps
• Applications: Addition and multiplication
• Flip-Flops

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Boolean Variables

• Boolean algebra differs from ordinary algebra in that boolean

constants and variables are allowed to have only two possible values, 0 or 1.

• Boolean 0 and 1 do not represent actual numbers but instead

represent its logic level.

• Some common representation of 0 and 1:
• There are three basic logic
• perations for boolean 0 and 1:

OR, AND and NOT.

• Two extended operations:

NOR, and NAND are also used extensively in digital circuits.

Close switch Open switch Yes No High Low On Off True False Logic 1 Logic 0

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Truth Table

• A means for describing how a logic circuit's output depends on

the logic levels present at the circuit's inputs.

• A truth table lists all possible combinations of logic levels

present at inputs (A and B in the following example) along with the corresponding output level (X). When either input A OR B is 1, the output X is 1. Therefore the "?" in the box is an OR gate.

• We will explore more on the OR gate later.

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Function

Output Input(s)

Function

We can represent logical functions in two analogous ways. —A Boolean expression is finite but not unique. — A truth table turns out to be unique and finite.

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OR Operation

• The expression X = A + B reads as "X equals A OR B".

The + sign stands for the OR operation, not for ordinary addition.

• The OR operation produces a result of 1 when any of the input variable is 1.
• The OR operation produces a result of 0 only when all the input variables are 0.

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AND Operation

• The expression X = A * B (or X=AB) reads as "X equals A AND B".

The multiplication sign stands for the AND operation, same for

• rdinary multiplication of 1s and 0s.
• The AND operation produces a result of 1 occurs only for the single

case when all of the input variables are 1.

• The output is 0 for any case where one or more inputs are 0.

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NOT Operation

• The NOT operation is unlike the OR and AND operations in that it can be performed
• n a single input variable. For example, if the variable A is subjected to the NOT
• peration, the result x can be expressed as x = A'
• where the prime (') represents the NOT operation. This expression is read as:

x equals NOT A x equals the inverse of A x equals the complement of A

• Each of these is in common usage and all indicate that the logic value of x = A' is
• pposite to the logic value of A.
• The NOT operation is also referred to as inversion or complementation, and these

terms are used interchangeably.

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NOR Operation

• NOR is the same as the OR gate symbol except that it has a small circle
• n the output. This small circle represents the inversion operation.

Therefore, the output expression of the two input NOR gate is: X = ( A + B )', or X = A NOR B

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NAND Operation

• NAND is the same as the AND gate symbol except that

it has a small circle on the output. This small circle represents the inversion operation. Therefore the

• utput expression of the two input NAND gate is:

X = (AB)', or X = A NAND B

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A NAND for everything y x x x y x y x xy x x x ' xy' y y' NAND ' )' NAND ( NAND ' + = ⊕ = + = =

not and

• r

xor

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Table of Content

• Digital Number Systems
• Logic Gates
• Boolean Algebra
• Karnaugh Maps
• Applications: Addition and multiplication
• Flip-Flops

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Describing Logic Circuits Using Boolean Expressions

• Any logic circuit can be described using the Boolean
• perations

– Because OR gate, AND gate, and NOT circuit are the basic building blocks of digital systems!

• Examples of circuits using Boolean expression:
• A more complex example (with NOT):

Note: If an expression contains both AND and OR

• perations, the AND operations are performed

first (X=AB+C : AB is performed first), unless there are parentheses in the expression, in which case the operation inside the parentheses is to be performed first (X=(A+B)+C : A+B is performed first).

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Simplifying Circuits

• The last example in previous page is actually

equivalent to this simpler one:

• Simpler hardware is almost always better.

– In many cases, simpler circuits are faster. – Less hardware means lower costs. – A smaller circuit also consumes less power.

• So were we able to simplify this particular circuit?

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Boolean Theorems: Single Variable

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Boolean Theorems: Mutiple Variables

x + x'y = x + y (15) x + xy = x, x(x+y) = x (absorption law) (14) (w+x)(y+z) = wy + xy + wz + xz (13b) x (y+z) = xy + xz, x + yz = (x+y)(x+z) (distribution law) (13a) x (yz) = (xy) z = xyz (associative law) (12) x+ (y+z) = (x+y) +z = x+y+z (associative law) (11) x * y = y * x (commutative law) (10) x + y = y + x (commutative law) (9)

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DeMorgan's Theorem

DeMorgan's Theorems

(16) (x+y)' = x' * y' (17) (x*y)' = x' + y'

They are extremely useful in simplifying expressions in which a product or sum of variables is inverted. E.g.,

X= [(A'+C) * (B+D')]' = (A'+C)' + (B+D')' [by theorem(17)] = (A''*C') + (B'+D'') [by theorem (16)] = AC' + B'D

Three Variables DeMorgan's Theorem

(18) (x+y+z)' = x' * y' * z' (19) (xyz)' = x' + y' + z'

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Implications of DeMorgan's Theorem

For (16): (x+y)' = x' * y' For (17): (x*y)' = x' + y'

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Alternate Logic Gate Representations

• 1. Invert each input and output of the standard symbol
• 2. Change the operation symbol from AND to OR, or from OR to AND.

Then, the alternate symbols are the same as standard symbols! They represent the same physical circuits.

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Sum of products expressions

• There are many equivalent ways to write a function, but some forms

turn out to be more useful than others

• A sum of product (SOP) expression consists of:

– One or more terms summed (OR'ed) together. – Each of those terms is a product of literals. F(x, y, z) = y' + x‘yz‘ + xz

• SOP expressions can be implemented with two-level circuits.

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Minterms

• A minterm is a special product term, where each input variable

appears exactly once.

• A function with n variables has up to 2n minterms. For example, a

three-variable function like f(x,y,z) has up to 8 minterms:

• Each minterm is true for exactly one combination of inputs:

x’y’z’ x’y’z x’yz’ x’yz xy’z’ xy’z xyz’ xyz Mint erm I s t rue when… Short hand x’y’z’ xyz = 000 m0 x’y’z xyz = 001 m1 x’yz’ xyz = 010 m2 x’yz xyz = 011 m3 xy’z’ xyz = 100 m4 xy’z xyz = 101 m5 xyz’ xyz = 110 m6 xyz xyz = 110 m7

Hey! This looks like a t rut h t able!

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Sum of minterms form

• Every function can be written as a sum of minterms, which is a

special kind of sum of products form.

• The sum of minterms form for any function is unique.
• If you have a truth table for a function, you can write a sum of

minterms expression just by picking out the rows of the table where the function output is 1.

x y z f (x,y,z) f ’(x,y,z) 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 f = m0 + m1 + m2 + m3 + m6 = Σm(0,1,2,3,6) = x’y’z’ + x’y’z + x’yz’ + x’yz + xyz’ f ’ = m4 + m5 + m7 = Σm(4,5,7) = xy’z’ + xy’z + xyz f ’ cont ains all t he mint erms not in f .

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Table of Content

• Digital Number Systems
• Logic Gates
• Boolean Algebra
• Karnaugh Maps
• Applications: Addition and multiplication
• Flip-Flops

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Karnaugh Maps

• So far we used Boolean Algebra to build hardware

circuits

– The basic Boolean operations are AND, OR and NOT – Logic gates implement these operations in hardware – Boolean algebra helps us simplify expressions and circuits

• Expressions can be written in many ways, so

standard representations like sum of products and sums of minterms are sometimes useful.

• Now we study Karnaugh Maps, an alternative, more

"graphical" simplication technique that enables us to build and study larger, more realistic circuits.

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Minimum Sums of Products

• When used properly, Karnaugh maps can reduce

expressions to a minimal sum of products (MSP) form.

– There are a minimal number of product terms. – Each product has a minimal number of literals.

• A minimal sum of products may not be "minimal" by
• ther definitions! E.g., x (y + z) = xy + xz

– The expression on the left has fewer literals and fewer

• perators than the one on the right, but it is not a sum of

products. – On the other hand, xy+xz is a sum of products, and it is minimal.

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K-Map

• Re-arrange them into a Karnaugh

map, or K-Map

• You can show either the actual

minterms or just the minterm numbers

• Notice the minterms are almost,

but not quite, in numeric order

• Recall that an n-variable

function has up to 2n minterms, one for each possible input combination

• A function with input x, y and

z includes up to 8 minterms:

xyz‘ xyz xy‘z xy‘z‘ x‘yz‘ x‘yz x‘y‘z x‘y‘z‘ m6 m7 m5 m4 m2 m3 m1 m0

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The Pattern of K-Map

• The literal x occurs in 4

minterms in the bottom, while x‘ occurs in top 4.

• The literal y occurs in

right 4, while y‘ in left.

• The literal z occurs in

middle 4 squares, while z‘ occurs in the 1st and 4th columns.

xyz‘ xyz xy‘z xy‘z‘ x‘yz‘ x‘yz x‘y‘z x‘y‘z‘ xyz‘ xyz xy‘z xy‘z‘ x‘yz‘ x‘yz x‘y‘z x‘y‘z‘ xyz‘ xyz xy‘z xy‘z‘ x‘yz‘ x‘yz x‘y‘z x‘y‘z‘

x' x y' y z' z z'

We can base on this feature and simplify sums of minterms, without any Boolean algebra at all ! e.g., x'y'z' + x'y'z = x'y

x'yz + x'yz' + xyz + xyz' = y

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Map Simplifications

• Four steps

– Start with a sum of minterms or true table – Plot the minterms on a K-map: put 1 in the K-map squares that correspond to the function minterms, 0 in the

• thers

– Find rectangular groups of minterms whose sizes are powers of two. – Reduce each group to one product term.

• Two important goals when forming

minterm groups

– Making as few groups as possible – Making each group as large as possible

• Doing this properly will get a minimal

sum of products.

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Multiple solutions are possible

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Table of Content

• Digital Number Systems
• Logic Gates
• Boolean Algebra
• Karnaugh Maps
• Applications: Addition and multiplication
• Flip-Flops

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Adding two bits

• How to make a hardware

adder?

– We recall how human adds

• Now we start with a half

adder, which adds two bits X and Y and produces a two-bit results: a sum S (the right bit) and a carry out C (the left bit).

• Here are truth tables, expressions, circuits and bock symbol.

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Adding three bits

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Full adder expressions

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Full adder circuit

• We write the expression this way to highlight the hierarchical

nature of adder circuits – you can build a full adder by combining two half adders!

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2x2 binary multiplication

• Here is an outline of multiplying the

two-bit numbers A1A0 and B1B0, to produce the four-bit product P3- P0.

• The bits of each partial product are

computed by multiplying two bits of the input

• Since two-bit multiplication is the

same as the logical AND operation, we can use AND gates to generate the partial products.

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A 2x2 binary multiplier

• Here is a circuit that

multiplies A1A0 and B1B0, resulting P3-P0

• For a 2x2 multiplier we can

just use two half adders to sum the partial products. In general, however, we‘ll need full adders

• The diagram on the next

page shows how this can be extended to a four-bit multiplier, taking inputs A3- A0 and B3-B0 and outputting the product P7-P0.

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A 4x4 binary multiplier

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Shifty arithmetic operations

• In decimal, an easy way to multiply by 10 is to shift all

the digits to the left, and tack a 0 to the right end. 128 x 10 = 1280

• We can do similarly in binary. Shifting left once

multiplies by two. 11x 10 = 110 (in decimal, 3x2 = 6)

• Shifting left twice is equivalent to multiplying by four.

11x 100 = 1100 (in decimal, 3x4 = 12)

• Similarly, shifting once to the right is equivalent to

dividing by two. 1100 / 10 = 100 (in decimal, 12/2 = 6)

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Summary

• Arithmetic is the most basic thing that you can do

with a computer; the circuits reflect human algorithms for addition and multiplication

• Addition, and multiplication are central operations of

Arithmetic-Logic Units (ALUs), which are the "heart"

• f CPUs
• Adders and multiplication are built hierarchically

– Start with half adders and full adders and base on them

• Note: adder circuits are limited in the number of bits

that can handled. An overflow occurs when a result exceeds this limit.

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Table of Content

• Digital Number Systems
• Logic Gates
• Boolean Algebra
• Karnaugh Maps
• Applications: Addition and multiplication
• Flip-Flops

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Combinational Circuits

• So far we‘ve only worked with combination circuits,

where applying the same inputs always produces the same outputs

– This corresponds to a mathematical function, where every input has a single, unique output – In programming terminology, combination circuits are similar to "functional programs" that do not contain variables and assignments

• Such circuits are relatively easy to design and

analyze

Combinational Circuits Inputs Outputs

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Sequential Circuits

• In contrast, the outputs of a sequential circuit depend
• n not only the inputs, but also the state, or the

current contents of some memory.

• This makes things more difficult to understand since

the same inputs can yield different outputs, depending on what's stored in memory.

• The memory contents can also change as the circuit

runs, so the order in which things occur makes a difference.

Combinational Circuits Inputs Outputs Memory

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Memory Elements

Memory element: a device which can remember

value indefinitely, or change value on command from its inputs.

Characteristic table:

Command (at time t) Q(t) Q(t+1) Set X 1 Reset X Memorise / No Change 1 1

command Memory element stored value Q

Q(t): current state Q(t+1) or Q+: next state

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Memory Elements

Memory element with clock. Flip-flops are memory

elements that change state on clock signals.

Clock is usually a square wave.

command Memory element stored value Q clock Positive edges Negative edges Positive pulses

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Memory Elements

Two types of triggering/activation:

pulse-triggered edge-triggered

Pulse-triggered

latches ON = 1, OFF = 0

Edge-triggered

flip-flops positive edge-triggered (ON = from 0 to 1; OFF = other

time)

negative edge-triggered (ON = from 1 to 0; OFF = other

time)

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An interesting circuit

• An SR latch above has two inputs S and R, which will let us control the
• utputs Q and Q‘.
• Here Q and Q‘ feedback into the circuit. They are not only outputs,

they‘re also inputs!

• To figure out how Q and Q‘ change, we have to look at both inputs S

and R, but also the current values of Q and Q‘:

Qnext = (R+Q‘current)‘ Qnext = (S+Q‘current)‘

• If S = 0, R=0: Qnext = Qcurren, Q‘next = Q‘current
• This is exactly what we need to store values in the latch.
• Instable state: SR=11 will cause Q and Q‘ cycle between 0 and 1
• forever. Nobody sets SR = 11.

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Setting and Resetting the Latch

Qnext = (R+Q‘current)‘ Qnext = (S+Q‘current)‘

• Setting the latch:

– If S = 1, R = 0. Q‘next = 0 Qnext = 1

– This is how you set the latch to 1, S means "Set“ – Notice it can take up to two steps (two gate delays) from the time S becomes 1 to the time Qnext = 1. – But once Qnext becomes 1, the outputs will stop

• changing. This is a stable state.
• Resetting the latch:

– If S = 0, R = 1. Qnext = 1 Qnext = 0

– This is how you reset or clear the latch to 0, R means "Reset“ – Again it can take up to two steps (two gate delays) from the time R becomes 1 to the time Qnext = 0. – But once Qnext becomes 0, the outputs will stop changing. This is also a stable state.

• Timing considerations:

– Assume initially Q=0, Q‘=1. Input SR=10. – As S=1, Q‘ will change from 1 to 0 after one NOR-gate delay (vertical lines in the figure) – This change in Q‘, along with R=0, causes Q to become 1 after another gate delay – The latch then stablizes until S or R changes again – You have to think about time-critical issue in computing: e.g., signals arrive at some time, while the logic takes some time to reactDifficult to control timing in a large circuit.

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SR latch with control input

• Here is an SR latch with control input C, or so-called Gated

SR latch. C behaves like an enabler: Outputs change (if necessary) only when C is HIGH.

• Drawback of S-R latch: invalid condition exists and must be

avoided.

S C R Q Q'

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D latch

• a D latch is based on an S'R' latch and additional gates,

together with inputs D and C

– When C = 0, S‘ and R‘ are both 1, so Q doesn‘t change – When C = 1, then Q = D (if D=1, latch is set; otherwise is reset)

• Features:

– If C=0, Q ‘follows’ the D (data) input. – It only needs one input (C) for resetting – No "invalid“ input combinations

D C Q Q'

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Latch Circuits: Not Suitable

Latch circuits are not suitable in synchronous logic

circuits.

When the enable signal is active, the excitation

inputs are gated directly to the output Q. Thus, any change in the excitation input immediately causes a change in the latch output.

The problem is solved by using a special timing

control signal called a clock to restrict the times at which the states of the memory elements may change.

This leads us to the edge-triggered memory

elements called flip-flops.

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Edge-Triggered Flip-flops

Flip-flops: synchronous bistable devices

– Syncronous: output changes state only when the clock input is

• triggered. i.e., changes in the output occur in syncronization with

the clock. – Bistable: there are two stable states. It is able to retain the two states (SET and RESET) indefinitely.

Output changes state at a specified point on a triggering input

called the clock.

Change state either at the positive edge (rising edge) or at the

negative edge (falling edge) of the clock signal.

Positive edges Negative edges

Clock signal

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Edge-Triggered Flip-flops

S-R, D and J-K edge-triggered flip-flops.

Note the “>” symbol at the clock input.

S C R Q Q' S C R Q Q' D C Q Q' D C Q Q' J C K Q Q' J C K Q Q'

Positive edge-triggered flip-flops Negative edge-triggered flip-flops

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S-R Flip-flop

S-R flip-flop: on the triggering edge of the clock pulse,

S=HIGH (and R=LOW) SET state R=HIGH (and S=LOW) RESET state both inputs LOW no change both inputs HIGH invalid

Characteristic table of positive edge-triggered S-R

flip-flop:

X = irrelevant (“don’t care”) ↑ ↑ ↑ ↑ = clock transition LOW to HIGH

S R CLK Q(t+1) Comments X Q(t) No change 1 ↑ ↑ ↑ ↑ Reset 1 ↑ ↑ ↑ ↑ 1 Set 1 1 ↑ ↑ ↑ ↑ ? Invalid

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S-R Flip-flop

It comprises 3 parts:

a basic NAND latch a pulse-steering circuit a pulse transition detector (or edge detector)

circuit

The pulse transition detector detects a rising

(or falling) edge and produces a very short- duration spike.

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S-R Flip-flop

The pulse transition detector.

S Q Q' CLK Pulse transition detector R

Positive-going transition (rising edge)

CLK CLK' CLK* CLK' CLK CLK*

Negative-going transition (falling edge)

CLK' CLK CLK* CLK CLK' CLK*

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D Flip-flop

D flip-flop: single input D (data)

D=HIGH SET state D=LOW RESET state

Q follows D at the clock edge. Convert S-R flip-flop into a D flip-flop: add an inverter.

A positive edge-triggered D flip-flop formed with an S-R flip-flop.

S C R Q Q' CLK D D CLK Q(t+1) Comments 1 ↑ ↑ ↑ ↑ 1 Set ↑ ↑ ↑ ↑ Reset

↑ ↑ ↑ ↑ = clock transition LOW to HIGH

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D Flip-flop

Application: Parallel data transfer.

To transfer logic-circuit outputs X, Y, Z to flip-flops Q1, Q2 and Q3 for storage.

* After occurrence of negative-going transition Q1 = X* D CLK Q Q' Q2 = Y* D CLK Q Q' Q3 = Z* D CLK Q Q'

Combinational logic circuit

Transfer X Y Z

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J-K Flip-flop

J-K flip-flop: Q and Q' are fed back to the

pulse-steering NAND gates.

No invalid state. Include a toggle state.

J=HIGH (and K=LOW) SET state K=HIGH (and J=LOW) RESET state both inputs LOW no change both inputs HIGH toggle

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J-K Flip-flop

J-K flip-flop. Characteristic table.

J Q Q' CLK Pulse transition detector K

J K CLK Q(t+1) Comments ↑ ↑ ↑ ↑ Q(t) No change 1 ↑ ↑ ↑ ↑ Reset 1 ↑ ↑ ↑ ↑ 1 Set 1 1 ↑ ↑ ↑ ↑ Q(t)' Toggle Q J K Q(t+1) 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

Q(t+1) = J.Q' + K'.Q

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Asynchronous Inputs

S-R, D and J-K inputs are synchronous inputs, as

data on these inputs are transferred to the flip-flop’s

• utput only on the triggered edge of the clock pulse.

Asynchronous inputs affect the state of the flip-flop

independent of the clock; example: preset (PRE) and clear (CLR) [or direct set (SD) and direct reset (RD)]

When PRE=HIGH, Q is immediately set to HIGH. When CLR=HIGH, Q is immediately cleared to LOW. Flip-flop in normal operation mode when both PRE

and CLR are LOW.

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Asynchronous Inputs

A J-K flip-flop with active-LOW preset and clear inputs.

J Q Q' CLK Pulse transition detector K PRE CLR

J C K Q Q'

PRE CLR PRE CLR CLK Q Preset Toggle Clear

J = K = HIGH

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Flip-flop Characteristic Tables

Each type of flip-flop has its own behavior.

The characteristic tables for the various types of flip-flops are shown below:

S R Q(t+1) Comments Q(t) No change 1 Reset 1 1 Set 1 1 ? Unpredictable J K Q(t+1) Comments Q(t) No change 1 Reset 1 1 Set 1 1 Q(t)' Toggle T Q(t+1) Q(t) No change 1 Q(t)' Toggle D Q(t+1) Reset 1 1 Set

JK Flip-flop SR Flip-flop D Flip-flop T Flip-flop

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Sequential Circuit Analysis

Given a sequential circuit diagram, analyze its

behaviour by deriving its state table and hence its state diagram.

Requires state equations to be derived for the flip-flop

inputs, as well as output functions for the circuit

• utputs other than the flip-flops (if any).

We use A(t) and A(t+1) to represent the present state

and next state, respectively, of a flip-flop represented by A.

Alternatively, we could simply use A and A+ for the

present state and next state respectively.

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Sequential Circuit Analysis

Example (using D flip-flops):

State equations: A+ = A.x + B.x B+ = A'.x Output function: y = (A + B).x'

A A' B B' y x CP D Q Q' D Q Q'

Figure 1.

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Sequential Circuit Analysis

From the state equations and output function,

we derive the state table, consisting of all possible binary combinations of present states and inputs.

State table

Similar to truth table. Inputs and present state on the left side. Outputs and next state on the right side.

m flip-flops and n inputs → 2m+n rows.

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Sequential Circuit Analysis

State table for the circuit of Figure 1:

State equations: A+ = A.x + B.x B+ = A'.x Output function: y = (A + B).x'

Present Next State Input State Output A B x A+ B+ y 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

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Sequential Circuit Analysis

Alternate form of state table:

Present Next State Input State Output A B x A+ B+ y 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

Present Next State Output State x=0 x=1 x=0 x=1 AB A+B+ A+B+ y y 00 00 01 01 00 11 1 10 00 10 1 11 00 10 1

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Sequential Circuit Analysis

From the state table, we can draw the state diagram. State diagram

Each state is denoted by a circle. Each arrow (between two circles) denotes a transition of the

sequential circuit (a row in state table).

A label of the form a/b is attached to each arrow where a

denotes the inputs while b denotes the outputs of the circuit in that transition.

Each combination of the flip-flop values represents a

• state. Hence, m flip-flops → up to 2m states.

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Sequential Circuit Analysis

State diagram of the circuit of Figure 1:

Present Next State Output State x=0 x=1 x=0 x=1 AB A+B+ A+B+ y y 00 00 01 01 00 11 1 10 00 10 1 11 00 10 1

00 01 11 10 1/0 1/0 1/0 0/1 0/1 0/0 1/0 0/1

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Flip-flop Input Functions

The outputs of a sequential circuit are functions of

the present states of the flip-flops and the inputs. These are described algebraically by the circuit

• utput functions.

In Figure 1: y = (A + B).x'

The part of the circuit that generates inputs to the

flip-flops are described algebraically by the flip-flop input functions (or flip-flop input equations).

The flip-flop input functions determine the next state

generation.

From the flip-flop input functions and the

characteristic tables of the flip-flops, we obtain the next states of the flip-flops.

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Flip-flop Input Functions

Example: circuit with a JK flip-flop. We use 2 letters to denote each flip-flop input: the

first letter denotes the input of the flip-flop (J or K for JK flip-flop, S or R for SR flip-flop, D for D flip-flop, T for T flip-flop) and the second letter denotes the name of the flip-flop.

A B C' x B y CP J Q Q' K B' C x'

JA = B.C'.x + B'.C.x’ KA = B + y

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Flip-flop Input Functions

In Figure 1, we obtain the following state equations

by observing that Q+ = DQ for a D flip-flop:

A+ = A.x + B.x (since DA = A.x + B.x) B+ = A'.x (since DB = A'.x)

A A' B B' y x CP D Q Q' D Q Q'

Figure 1.

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Analysis: Example #2

Given Figure 2, a sequential circuit with two JK flip-

flops A and B, and one input x.

Obtain the flip-flop input functions from the circuit:

JA = B JB = x' KA = B.x' KB = A'.x + A.x' = A NOR x

A B x CP J Q Q' K J Q Q' K

Figure 2.

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Analysis: Example #2

Flip-flop input functions:

JA = B JB = x' KA = B.x' JB = A'.x + A.x' = A NOR x

Fill the state table using the above functions,

knowing the characteristics of the flip-flops used.

Present Next state Input state Flip-flop inputs A B x A+ B+ JA KA JB KB 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

1 1 1 1 1 1 1 1 1

J K Q(t+1) Comments Q(t) No change 1 Reset 1 1 Set 1 1 Q(t)' Toggle

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Analysis: Example #2

Draw the state diagram from the state table.

Present Next state Input state Flip-flop inputs A B x A+ B+ JA KA JB KB 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

00 01 10 11 1 1 1 1

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Sequential Circuit Design

Design procedure:

Start with circuit specifications – description of circuit

behaviour.

Derive the state table. Perform state reduction if necessary. Perform state assignment. Determine number of flip-flops and label them. Choose the type of flip-flop to be used. Derive circuit output tables from the state table. Derive circuit output functions and flip-flop input functions. Draw the logic diagram.

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Design Example

Given the following state diagram, design the

sequential circuit using JK flip-flops.

00 10 11 1 1 1 1 01

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Design Example

Circuit state table, using JK flip-flops.

00 10 11

1 1 1 1

01

Present Next State State x=0 x=1 AB A+B+ A+B+ 00 00 01 01 10 01 10 10 11 11 11 00

Present Next state Input state Flip-flop inputs A B x A+ B+ JA KA JB KB 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

0 X 0 X 1 X 0 X X 0 X 0 X 0 X 1 0 X 1 X X 1 X 0 0 X 1 X X 0 X 1

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Design Example

From state table, get flip-flop input functions.

Present Next state Input state Flip-flop inputs A B x A+ B+ JA KA JB KB X X 1 1 X 1 X 1 1 1 X X 1 1 1 1 X X 1 1 X X 1 1 1 1 X 1 X 1 1 1 1 X X 1 1 1 X 1 X 1

A B 1 00 01 11 10 x A Bx X X X X 1

JA = B.x' JB = x

A B 1 00 01 11 10 x A Bx X 1 X X X 1

KA = B.x

A B 1 00 01 11 10 x A Bx X 1 X X X

KB = (A ⊕ ⊕ ⊕ ⊕ x)'

A B 1 00 01 11 10 x A Bx X 1 X 1 X X

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Design Example

Flip-flop input functions.

JA = B.x' JB = x KA = B.x KB = (A ⊕ x)'

Logic diagram:

x B A CP

J Q Q' K J Q Q' K

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Summary

Sequential circuits can be used to build memories

and they are more powerful than combinational circuits.

Analyzing sequential circuits

Flip-flop characteristic table State Table State diagram

Designing sequential circuits

Flip-flop state table Circuit output function Flip-flop input function