[PPT] - Process Technology to Fabricate High Performance MEMS on Top of PowerPoint Presentation

SLIDE 1

Process Technology to Fabricate High Performance MEMS on Top of Advanced LSI

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Shuji Tanaka Tohoku University, Sendai, Japan

SLIDE 2

2 More Moore: Miniaturization

Integrated inertia sensors Integrated health care devices 3 µm 0.8 µm DMD

~2020 ~2025

One-chip multiband/ tunable wireless chips Implantable devices

~2015

Self-controlled

ne-chip sensors

Present

High performance integrated sensors Smaller More inteillent More distributed

JSAP Integrated MEMS Technology Roadmap

Nanoelectronics More than Moore: Diversification

SLIDE 3

W-LAN W-LAN Digital TV Digital TV W-CDMA W-CDMA PHS PHS WiMAX WiMAX GSM/PDC GSM/PDC

5.16～5.35 GHz 2.4～2.48 GHz 470～770 MHz 2.5～2.7 GHz 1.92～1.98 GHz UL 2.11～2.17 GHZ DL 800 MHz 900 MHz 1.9 GHz

4th Gen. 4th Gen.

1.88～1.92 GHz

Multiband Wireless Communication

3 Tx Rx

Multi-band wireless communication chip for W- CDMA + GSM/GPRS/EDGE (Qualcomm, QSC6240)

SLIDE 4

Integration of Wireless Communication System

LNA 0/90 º A/D A/D Digital signal processor Filter Mixer

Discrete devices Integrated devices based

n RF CMOS technology

Frequency tuning circuit

Unimplemented system Real one-chip solution enables not only advanced mobile communication systems but also ubiquitous network sensors, wireless healthcare chips etc. Integration of advanced LSI and “mechanical” devices (SAW/BAW filters, clock oscillators, RF MEMS switches, variable capacitors) is a key. Rx

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SLIDE 5

ADXRS150 2-axis gyro

Inertia Sensors (Analog Devices)

Detection circuit G sensor Safety steel ball sensor 125 μm 1.3 μm 2 μm 5

A tiny capacitance change (12 zF) corresponding to 1.6×10-4 Å displacement is detectable by the embedded integrated circuit in the gyro.

SLIDE 6

Integrated Accelerometer (Analog Devices)

Poly-Si sensor structure on 3 µm-ruled, W-metalized BiCMOS Poly-Si annealing at 1100 °C for 30 min, Impossible to fabricate in LSI foundry

Circuit (NPN, NMOS) Poly Si sensor structure

On-CMOS structure SOI MEMS structure

Sensor structure release from this trench Sensor structure Circuit

Single crystal Si sensor structure beside 0.6 μm-ruled, Al-metalized CMOS Compatible with advanced LSI from LSI foundry, Low space efficiency

Judy et al., Hilton Head Island WS 2004, 27 SOI Trench isolation

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SLIDE 7

Digital Micromirror Device (TI)

10~16 μm square micromirrors
~2 μs response time
8.5 V driving voltage
±12 ° tilt angle
848×600 = 508800 pixels for SVGA

~ 1280×1024 = 1310720 pixels for SXGA

Hornbeck, IEDM 2007, 17-24

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SLIDE 8

Applications of DMD

Rear-projection television

Panasonic

Projector for cinema complex

NEC

Mobile projector

NEC Weight: 1 kg

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SLIDE 9

Metal Surface Micromachining for DMD (TI)

0.8 µm CMOS address circuit (SRAM) Al SiO2 SiO2 Al Al Resist Kessel et al.,

Proc. IEEE,

86 (1998) 1687

1. Sacrificial resist layer
2. Al and SiO2 mask for hinges
3. Al and SiO2 mask for beams
4. Al etching for beams and hinges
5. Sacrificial resist layer and Al mirror
6. Sacrificial resist etching

Resist Hornbeck, IEDM 2007, 17-24

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SLIDE 10

MEMS-LSI Integration using Ge Sacrificial Layer

Ge Al Au/Cr AlN

1. Ge patterning and SiO2 deposition
2. Metal patterning and AlN deposition
3. AlN and Au/Cr patterning
4. Ge sacrificial etching

SiO2 Mo LSI

Collaboration with NDK

Multi-freq. AlN Lamb wave resonator

monolithically integrated with LSI

Application to one-chip high-speed

communication devices 100 μm 310 MHz

LSI 10

SLIDE 11

Electrostatic-Actuated Capacitive Shunt Switch

Ni bridge Dielectric layer(SiO2)

30
25
20
15
10
5

5 10 15 20 1 3 5 7 Freqency（GHｚ）

0.5
0.45
0.4
0.35
0.3
0.25
0.2
0.15
0.1
0.05

Insert loss Isolation

Frequency (GHz) Isolation (dB) Insertion loss (dB)

Off state On state

Signal Ground Actuation pad Ground 200 µm

Notches for close contact

GND GND Signal Sacrificial PR (3.5 µm) Sacrificial PR (1.5 µm) Driving voltage: 38 V Yuki et al., Sensor Symposium 2007

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SLIDE 12

Wafer-Level Packaging of RF MEMS Switch

DC in (Au/Cr) CPW CPW Dry film resist Cavity

RF MEMS switch packaged by dry film resist

Exposed part Polyolefin mold Dry film resist

1. Molding dry film resist
3. Laminating molded dry

film resist and exposing

4. Developing and over-coating

Device wafer

2. Exposing dry film resist

Exposed part

Yuki et al., Sensor Symposium 2007

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SLIDE 13

Phase Shifter Using RF MEMS Switches

Z0 Z

1

Z0 Z

2

Capacitive shunt SW

Reflection type Switching line type

SW down Reflect here SW up Reflect here Capacitive shunt SW

0° 90° 22.5° 180° 45°

Reflection-type phase shifter using RF MEMS switch (Taiko Denki & Tohoku Univ.)

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SLIDE 14

Memory Effect of Metal Hinges in DMD

A. B. Southeimer, IEEE 40th Annual International

Reliability Physics Symposium, Dallas, TX, 2002

50 % / 50% 5 % / 95% Shift (%) of bias voltage at which a half of mirrors land on the left side Duty cycle in accelerating test

Simulating random image Simulating static image

Test duration Mirrors exhibiting hinge memory

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SLIDE 15

Wafer Bonding-based MEMS-LSI Integration

1. Preparation of a device

layer on a support wafer Adhesion layer Device layer e.g.) Single crystal Si, Piezoelectric materials, Diamond, Compound semiconductors Support wafer Interlayer

2. Fabrication of a LSI wafer
3. Low temperature bonding of

the device layer and the LSI wafer LSI wafer e.g.) SiO2, Polymer 15

4. Removal of the support

wafer/Thinning of the device wafer

5. Fabrication of MEMS (e.g.

RF MEMS switch, variable capacitor) or SAW/BAW devices

6. Release of the device by

sacrificial etching LSI wafer Electrical connection Polymer

SLIDE 16

Single Crystal RF MEMS Switch on Top of LSI

Actuation electrode Metal anchor Single crystal Si cantilever Signal line

RF MEMS switches on a dummy LSI wafer

Metal anchor 200 μm Single crystal Si cantilever 200 μm Metal anchor Single crystal Si bridge

5 10 15 20 25 200 400 600 800 1000 Hight (μm) Lateral length (μm)

OFF (Vdrive = 0 V) ON (Vdrive = 8 V) OFF ON

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SLIDE 17

Single-Crystal-Si-on-LSI (SOL) Technology

1. Fabrication of metal pads
n a (dummy) LSI wafer
2. Bonding a SOI wafer on

the LSI wafer using polymer interlayer

3. Etching of the handle and

BOX layers

4. Patterning of metal

electrodes

5. Shape formation of the

device by reactive ion etching

6. Cu electroplating using

photoresist molds for electrical connection

7. Removal of the

photoresist molds

8. Sacrificial polymer etching

by O2 ashing to release the device LSI wafer SOI wafer Polymer Cu Photoresist mold

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200 μm

SLIDE 18

AlN/Si Composite Resonators on Top of LSI

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1. Electrically-coupled AlN/Si

composite thickness-mode filter

2. Mechanical-coupled AlN/Si

composite disk array filter

Si In Out GND

Coupling Beam

4 λ

Si In Out GND SiO2

Out-of-phase mode In-phase mode

Collaboration with

Mr. Matsumura (NiCT)

AlN Si AlN Si

SLIDE 19

Single-Crystal-Si-on-LSI (SOL) Technology

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1. Wafer bonding using polymer

Polymer LSI SOI wafer

3. Metal patterning
5. Metal patterning
6. Si etching
7. Sacrificial polymer etching

Ru Au/Cr Al Au/Cr Au/T i

2. Handle layer and BOX layer etching
4. AlN deposition and patterning

AlN Resist

SiO2

SLIDE 20

AlN/Si Composite Resonators on Top of LSI

20 Unpublished data

SLIDE 21

Share Wafer System in Tohoku University

Given process → Call for devices Given process → Call for devices Registration from A corp., B univ. … Registration from A corp., B univ. …

A B C D E F G H I A B

Group A Sensor circuit Group A Sensor circuit Group B Driver circuit Group B Driver circuit Group C Oscillator circuit Group C Oscillator circuit Coordination with LSI foundry Coordination with LSI foundry

A B C D A B C D A B C D

Is there a common process? Is there a common process? Multiple devices in each shot Group D Actuator circuit Group D Actuator circuit Delivery after chip separation Delivery after chip separation Full wafers to each group Full wafers to each group Project members (NDA is concluded.)

Shuttle service Share wafer system

MEMS fabrication by each group MEMS fabrication by each group 21

SLIDE 22

Summary

There is strong demands for monolithic integration of

advanced LSI and “mechanical” devices such as clock

scillators, mechanical filters, switches and sensors.

“More than Moore” with “Moore Moore” and “Biyond CMOS”

There are varieties of existing MEMS-LSI integration

technology, but they are not suitable for the above applications.

We have developed new versatile microprocess technology

for the monolithic integration of high-performance MEMS on top of advanced LSI.

Using the developed technology, we fabricated RF MEMS