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Paper presentation Ultra-Portable Devices Paper: Christian C. Enz, Nicola Scolari, et al. Ultra Low-Power Radio Design for Wireless Sensor Networks, International Workshop on RF Integration Technology Nov. 30 Dec 02, 2005. Presented by:

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Paper presentation – Ultra-Portable Devices

Paper: Presented by:

Christian C. Enz, Nicola Scolari, et al. Ultra Low-Power Radio Design for Wireless Sensor Networks, International Workshop on RF Integration Technology

  • Nov. 30 – Dec 02, 2005.

Dejan Radjen

2009-02-09 1 Paper Presentation - Ultra Portable Devices

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Outline

  • Introduction
  • The Power Consumption Challenge in WSN
  • Wireless Sensor Network Architectures
  • Transceiver Design Considerations
  • Low-Power Transceiver Architectures
  • Analog-to-Digital Converter
  • Summary and Conclusions

2009-02-09 2 Paper Presentation - Ultra Portable Devices

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Introduction

  • A Wireless Sensor Network consists of a large number of sensor

nodes

  • Each node locally processes and stores data so it can be used by
  • ther nodes
  • The nodes might be placed in regions difficult to access and must

therefore be energetically autonomous

  • A targeted node lifetime ranges typically between 2 – 5 years

2010-02-09 Paper Presentation - Ultra Portable Devices 3

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The Power Consumption Challenge in WSN

  • Lifetime 2-7 years requires an average powers of 10 – 100 μW
  • Can be reached only by duty cycling and by minimizing the sleep mode

current

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Lifetime of a sensor node powered by a 1.5 V AA battery Capacity: 2.6 Ah, Assumed leakage current: 30 μA

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The Power Consumption Challenge in WSN

  • Severe constraints on sensor node design

– Limited processing speed and storage capacity – Keep communication bandwidth at minimum

  • Several ways of reducing the power consumption of a sensor

node

– Use of ad-hoc networks and multi-hop communication – Trade-off between communication and local computing – More efficient radio design (low duty cycle) – More energy efficient protocols and routing algorithms

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Wireless Sensor Network Architectures

  • Infrastructure networks → the sensor nodes communicate via a

base station

  • Ad hoc networks → multi hop communication between sensor

nodes

– Takes advantage of the exponential decrease in radiated power – The following is a quite optimistic estimate d = distance d in a single hop α = radiated power exponent

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Transceiver Design Considerations

  • The end-of-life voltage of a 1.5 V AA alkaline battery is 0.9 V
  • Low supply voltages force the transistors to operate in moderate or

even weak inversion

  • Moderate inversion offers a good trade of between current

generation efficiency and speed

  • Small currents lead to small gm and significantly higher

impedances than 50Ω are required for RF-design

2010-02-09 Paper Presentation - Ultra Portable Devices 7

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Transceiver Design Considerations

Duty Cycle and Optimum Data Rate

  • Smaller data rate → smaller signal and noise bandwidth
  • Higher system noise figure is acceptable assuming a

given receiver sensitivity

  • The above statements are true if the duty cycle is 100 %
  • The radio has to be duty cycled to reach desired power

consumption

  • The power consumption is roughly divided as

– P0 = Fixed power mainly due to the frequency synthesizer – Pdem = Demodulation chain power (LNA, mixers, filters, etc…)

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Transceiver Design Considerations

Duty Cycle and Optimum Data Rate

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Transceiver Design Considerations

Modulation

  • Binary modulation schemes for simple transceiver architectures

– OOK, FSK and BPSK

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OOK and FSK Modulation OQPSK Modulation

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Transceiver Design Considerations

Modulation

  • OOK is the most basic modulation

– Special encoding used to avoid long series of identical bits – Requires automatic gain control → might be power consuming and slow – Peak output power twice as large as for FSK or BPSK

  • FSK suitable for direct conversion architectures

– Wide band FSK (WBFSK) further simplifies the receiver – Δf > BW, very little signal power around the carrier – Poor spectral efficiency

  • BPSK is the most efficient binary modulation

– Requires less SNR than OOK and FSK – Requires an ADC which becomes power hungry

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Low-Power Transceiver architectures

Receiver Architectures

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Super heterodyne Super regenerative

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Low-Power Transceiver architectures

Receiver Architectures

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Low-IF Zero IF or direct conversion

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Low-Power Transceiver architectures

Transmitter Architectures

  • Direct modulation of the VCO-signal

– Changing the reference frequency directly – Alteration of the frequency divider ratio – Direct modulation of the control voltage of the LC-tank VCO varactors

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  • Upconversion architecture
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Low-Power Transceiver architectures

The 1st Generation of WiseNet Transceivers

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Low-Power Transceiver architectures

Main Measured Results of the 1st generation WiseNet

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Low-Power Transceiver architectures

The 2nd Generation of WiseNet Transceivers

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Low-Power Transceiver architectures

Main Measured Results of the 2nd Generation WiseNet

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Analog to Digital Converter

  • For higher data rates and better spectral efficiency phase

modulation can be used

  • An ADC is required in the receiver chain for successful

demodulation

  • Two approaches for analog to digital conversion are proposed

– Quadrature ∑Δ converters – Phase Analog-to-Digital Converters

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Analog to Digital Converter

Quadrature ∑Δ converters

  • A direct conversion receiver suffers from flicker noise and self

coupling of the LO

  • In addition to low pass filtering, high pass filtering is required → a

band pass filter is needed in front of low pass ∑Δ - converter

  • Low corner frequency is hard to achieve → solution: a very low IF

receiver

  • With a non zero IF, the quantization noise becomes an issue →

solution: shift the low pass NTF to IF

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Analog to Digital Converter

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Quadrature ∑Δ converters

NTF-shift Band pass STF

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Analog to Digital Converter

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Quadrature ∑Δ converters

Low pass ∑Δ-modulator Quadrature ∑Δ-modulator

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Analog to Digital Converter

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Quadrature ∑Δ converters

GmC implementation of a complex resonator

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Analog to Digital Converter

Phase Analog-to-Digital Converters

  • After direct conversion the two normalized signal components are

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  • For QPSK it is ideally sufficient to keep track in which quadrant in

the constellation diagram the signal vector is

  • Due to intersymbol interference the vector might not always cross

from one quadrant to another

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Analog to Digital Converter

Phase Analog-to-Digital Converters

  • Quantization of quadrants

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  • Linear combination yields
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Analog to Digital Converter

Phase Analog-to-Digital Converters

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Thermometer code 2N – 1 Signals Detection of the signs

  • f the signals
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Analog to Digital Converter

Phase Analog-to-Digital Converters

Generation of Ik-signals

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Resistive bridge implementation Voltage outputs Resistive current divider implementation Current outputs Pseudo resistance implementation Current outputs

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Summary and Conclusions

  • The paper addresses different issues faced when designing ultra

low power WSN transceivers

  • Keep things as simple as possible
  • The type of modulation used has a strong impact on the complexity
  • f the radio
  • Simple binary modulation formats are preferred due to simple

demodulation

  • Direct conversion and low IF receiver architectures are preferred

due to their potential for higher integration

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