[PDF] - Output Voltage Ripple, Parasitic Effects 6.1 Output voltage ripple PDF Document

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Prof. S. Ben-Yaakov , DC-DC Converters

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Output Voltage Ripple, Parasitic Effects

6.1 Output voltage ripple (Buck) 6.2 Parasitic effects 6.2.1 Diode recovery 6.2.2 Internal delay of switching 6.2.3 Stray and leakage inductances

Clamp
Diode snubber (clamp)
Switch snubbers
Prof. S. Ben-Yaakov , DC-DC Converters

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IL t Iav t Iav IR IC t AC DC Capacitor Current

Output voltage ripple

S Vin D L C R IL IC IR control

Assumption:

Low output ripple voltage

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Prof. S. Ben-Yaakov , DC-DC Converters

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t2 t IC VC t 2 IL ∆

L

I ∆

c

V ∆ t1 Ts ; C Q VC ∆ = ∆ ; dt I Q

2 1

t t L

∫

= ∆ ; 2 1 2 T 2 I Q

s L

⋅ ⋅ ∆ = ∆

s L T

8 I Q ∆ = ∆

s L C

f 1 C 8 I V ∆ = ∆

Ripple

Prof. S. Ben-Yaakov , DC-DC Converters

[6- 4]

L / t V I

ff
L =

∆

s

ff
s
ff
L

Lf D V T D L V I = = ∆

2 s

ff
s

s

ff
C

CLf 8 D V f 8 1 CLf D V V = = ∆ The effect of fs

s

ff
Lf

D V I = ∆ L; fs can be traded for same ∆I C f 8 I V

s L C

∆ = ∆ C;fs can be traded for same ∆I& ∆VC if fs is increased for given L, C

2 s

ff
C

LCf 8 D V V = ∆

∆VC goes down -40 db/dec (second order)

Ripple

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Prof. S. Ben-Yaakov , DC-DC Converters

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Example

S Vin D L C R IL IC IR control

A 1 IL = ∆ F 47 C µ = S 10 Ts µ = Ω = m 10 ESR Find the output voltage ripple V ∆ mV 25 F 47 8 S 10 A 1 VC = µ ⋅ µ ⋅ = ∆ mV 10 A 1 m 10 VESR = ⋅ Ω = ∆ mV mV mV ESR V C V V 35 10 25 = + = ∆ + ∆ = ∆

Approximate (upper limit) of total ripple)

Prof. S. Ben-Yaakov , DC-DC Converters

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V2 TD = 0 TF = 0.01u PW = 10u PER = 20u V1 = 0 TR = 0.01u V2 = 15 Dbreak D1

ut_gnd

gate L2 {L1*(n*n)} RL {Load} drain V1 {Vin} R4 10meg

ut

C1 220u IC = 6 K K1 COUPLING = 1 K_Linear L1 = l1 L2 = l2 PARAM ET ERS: n = 0.5 Vin = 12 Load = 10 L1 = 300u

+

+
Sbreak

S1 L1 {L1}

Modify circuit to include ESR=100mΩ Find ripple at output

Application of Simulation

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Prof. S. Ben-Yaakov , DC-DC Converters

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Reverse current at switch turn on

Diodes Recovery – Implications

Vin L C R Vx Vo

Soft and hard recovery

Prof. S. Ben-Yaakov , DC-DC Converters

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Stages in diode recovery

Diode voltage t VD VDmax VO

Lstray Lstray Lstray ESR Lstray Lstray ESR

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Prof. S. Ben-Yaakov , DC-DC Converters

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Turn “off” of transistor

Lstray Lstray Lstray Co Vo Lmain ESR Lmain Lstray Lstray

t VDS VO

Prof. S. Ben-Yaakov , DC-DC Converters

[6- 10]

Diode forward recovery

I

I t t VD VPK VF

L clamp +VC

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Prof. S. Ben-Yaakov , DC-DC Converters

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Parasitic effects: Internal delay

V'gs Vgs Depend on Q To turn “on”

RG RL CGS LS Vgs

gs

V′ (real)

RL

G L gs S

R R C L Q + =

Prof. S. Ben-Yaakov , DC-DC Converters

[6- 12]

∗ limiting maximum voltage Vin Llkg VO Cdss Vin Llkg Cdss

V′

Vds Ipk

Clamps

t VDS VO

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Prof. S. Ben-Yaakov , DC-DC Converters

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Vin Llkg VO Cc Rc Very fast diode n:1 Vin Llkg VO Cdss n:1

Vz > Vin + Vo’ = Vin + nVo

Solutions

Prof. S. Ben-Yaakov , DC-DC Converters

[6- 14]

A B Clamp B is better from the point of view

f efficiency.
in

C

V V ) A ( V ′ + = But ...

Simple Example

Vin Vin

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Prof. S. Ben-Yaakov , DC-DC Converters

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Energy of L1 L2 L3 L4 will cause high spike on C (FET). The FET is not protected!

Rule:

Connect clamps and snubbers directly to the elements to be protected

Vin L2 L3 L4 L1 C

Parasitic inductance

Prof. S. Ben-Yaakov , DC-DC Converters

[6- 16]

To protect FET

Still:

Vin Line Line LS LD RG G S D

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Prof. S. Ben-Yaakov , DC-DC Converters

[6- 17]

Designing the Snubber Components

Vin Cc Rc Llkg

Prof. S. Ben-Yaakov , DC-DC Converters

[6- 18]

av

V

Cc

V V ∆

s

T

Cc

V

c

C

c

R

pav

I energy Parasitic

VCc > Vo’

'

V

+

C

R

Cc

V

lkg

L

p

I

Snubber

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Prof. S. Ben-Yaakov , DC-DC Converters

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Ip av· Rc = VCc av Rc· Cc = T > Ts

pk

I

p

t dt dI

p

I

lkg

av

Cc p

L ' V V dt dI − = ' V V I L t

av

Cc pk lkg p

− =

Leakage discharge

Prof. S. Ben-Yaakov , DC-DC Converters

[6- 20]

s p pk av p

f 2 t I I ⋅ ⋅ = Procedure

1. Select VCc av
2. Calculate Ip av
3. Select
4. Select Cc T > Ts
5. Trim in-circuit

av p av Cc c

I V R =

Leakage average current

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Prof. S. Ben-Yaakov , DC-DC Converters

[6- 21]

Simulation Exercise

Add 1uH leakage to Flyback converter. Design a

clamp and check it by simulation.

V2 TD = 0 TF = 0.01u PW = 10u PER = 20u V1 = 0 TR = 0.01u V2 = 15 Dbreak D1

ut_gnd

gate L2 {L1*(n*n)} RL {Load} drain V1 {Vin} R4 10meg

ut

C1 220u IC = 6 K K1 COUPLING = 1 K_Linear L1 = l1 L2 = l2 PARAM ET ERS: n = 0.5 Vin = 12 Load = 10 L1 = 300u

+

+
Sbreak

S1 L1 {L1}

Prof. S. Ben-Yaakov , DC-DC Converters

[6- 22]

Diode Snubber (clamp)

Vo Lstray

Diode Snubber

Lstray CD

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Prof. S. Ben-Yaakov , DC-DC Converters

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CD Lstray CS RS VO

D

V

V

snubber no snubber good snubber bad

D

V

O

V e arg l very is CS

Cs > CD Energy lost to snubber 2 C V

S 2

Snubber waveforms

Prof. S. Ben-Yaakov , DC-DC Converters

[6- 24]

Lstray CS RS VO Ipk Design - use simulation in circuit tuning Needed information Ipk ( Reverse ) Lstray V V C to moves 2 I L

s

2 pk stray

∆ + ⇒ ⇒ damping Rs ⇒

Snubber design

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Prof. S. Ben-Yaakov , DC-DC Converters

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Switch Snubbers

control

GS

V

S

V

S

V

S

I

d

J

switching

P t t t

Switching losses due to overlap Pd linear with fS !

Prof. S. Ben-Yaakov , DC-DC Converters

[6- 26]

dt dI

r

dt dV

f

control Snubbers = snubbers dt dV snubbers dt dI

Snubber types

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Prof. S. Ben-Yaakov , DC-DC Converters

[6- 27]

Passive (dissipative) snubber ∗ Energy lost to heat Non-dissipative (lossless) snubber ∗ Energy recovered Passive Snubbers ∗ by passive network Active snubbers ∗ by auxiliary active devices

Snubber types

Prof. S. Ben-Yaakov , DC-DC Converters

[6- 28]

control

GS

V

S

V dt dV

S

I

p

J t t t dt dI

Switching overlap

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Prof. S. Ben-Yaakov , DC-DC Converters

[6- 29]

Switch Snubber

V

C

V

C

dss

C

At turn off

dt dV (at turn off) can be slow down by adding external snubber capacitor C

Prof. S. Ben-Yaakov , DC-DC Converters

[6- 30]

dss

C C I dt dV + = Cdss - output capacitance of FET I = 1 Amp C + Cdss= 1nF S kV 1 10 10 10 1 dt dV

6 3 9

µ = = =

− −

dV/dt

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Prof. S. Ben-Yaakov , DC-DC Converters

[6- 31]

Problem at turn on !

s 2 O d 2 O C

f 2 CV P ) J ( 2 CV E ⋅ = = Example : VO = 400 V C = 1 nF fs = 100 kHz W 8 10 2 10 16 10 P

5 4 9 d

= ⋅ ⋅ ⋅ =

−

V

C

Capacitor losses

Prof. S. Ben-Yaakov , DC-DC Converters

[6- 32]

Solution

Snubbing

CS VO CS RS VO

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Prof. S. Ben-Yaakov , DC-DC Converters

[6- 33]

Reset

CS RS VO RDSon

If Rds on < Rs most energy will be lost to Rs → Heat Selection of Cs → Selection of Rs → to ensure reset

s s

n
n

s s

C R 4 t t C R 1 T ≈ << =

Prof. S. Ben-Yaakov , DC-DC Converters

[6- 34]

2 CV2

dss

C heat to lost f 2 V C

s 2 max dss

→       Linear with fs ! Switching losses (overlap) also linear with fs !

Losses

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Prof. S. Ben-Yaakov , DC-DC Converters

[6- 35]

Lossless snubbing (simple example)

2 VC 2 VC

C1 C2 L C1 , C2 of transistor plus external (if any)

1

Q

2

Q

L

I

1 DS

V

2 DS

V delay t t t t t

Prof. S. Ben-Yaakov , DC-DC Converters

[6- 36]

1

Q

2

Q

L

I

1 DS

V

2 DS

V delay t t t t t