Lecture 2: Combinational Logic CSE 140: Components and Design - - PowerPoint PPT Presentation

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Lecture 2: Combinational Logic CSE 140: Components and Design - - PowerPoint PPT Presentation

Lecture 2: Combinational Logic CSE 140: Components and Design Techniques for Digital Systems Spring 2014 CK Cheng, Diba Mirza Dept. of Computer Science and Engineering University of California, San Diego 1 Outline What is a


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Lecture 2: Combinational Logic

CSE 140: Components and Design Techniques for Digital Systems Spring 2014 CK Cheng, Diba Mirza

  • Dept. of Computer Science and Engineering

University of California, San Diego

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Outline

  • What is a combinational circuit?
  • Combinational Logic
  • 1. Scope
  • 2. Specification : Boolean algebra, truth tables
  • 3. Synthesis: circuits
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PI Q: What is a combinational circuit?

  • A. A circuit whose output depends only on

current inputs

  • B. A circuit that has memory of its past states
  • C. A circuit that contains any logic gate

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What is a combinational circuit?

  • Output depends only on current inputs
  • No memory
  • Example: Circuit that adds to binary numbers

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Digital Circuits Operate on Binary Values

  • Typically consider only two discrete values: 1’s and 0’s

– 1, TRUE, HIGH – 0, FALSE, LOW

  • 1 and 0 can be represented by anything (typically voltage)

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Basic Combinational Logic: Gates

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A B Y=

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Basic Combinational Logic: Gates

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A B Y= AB

A B Y 0 0 0 0 1 0 1 0 0 1 1 1 AND

Truth Table

Equivalence between:

– Symbol (Logic circuit) – Truth table – Boolean Equation

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Two-input operator AND (˄, · )

A B Y 0 0 0 0 1 0 1 0 0 1 1 1 AND

A 1 A

A B Y 0 0 0 0 1 1 1 0 1 1 1 1 OR

A 1 1 A A A

A Y 0 1 1 0 NOT

Boolean algebra and switching functions: Operators and Digital Logic Gates

0 dominates in AND 0 blocks the output 1 passes signal A 1 dominates in OR 1 blocks the output 0 passes signal A

Two-input operator OR (˅, + ) One-input operator NOT (Complement, ` )

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Starting with basic gates we want to build more complex logic circuits Problem Specification:

a b c d e Synthesis

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Combinational Logic: Scope

  • Description

– Language: e.g. C Programming, Verilog, VHDL – Boolean algebra – Truth table

  • Design

– Schematic Diagram – Inputs, Gates, Nets, Outputs

  • Goal

– Validity: correctness, turnaround time – Performance: power, timing, cost – Testability: yield, diagnosis, robustness

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1-<11> 1-<11>

  • Introduced binary variables
  • Introduced the three fundamental

logic operations: AND, OR, and NOT.

  • Born to working class parents
  • Taught himself mathematics and

joined the faculty of Queen’s College in Ireland.

  • Wrote An Investigation of the Laws
  • f Thought (1854)

Boolean Algebra: George Boole

George Boole: 1815 - 1864

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Boolean Algebra

Similar to regular algebra but defined on on a set (B) with only three basic ‘logical’ operations:

  • 1. Intersection: AND (2-input) , Operator: .
  • 2. Union: OR (2 input), Operator: +
  • 3. Complement: NOT ( 1 input) Operator:

These operations satisfy the following laws:

  • Commutative laws: a+b=b+a, a·b=b·a
  • Distributive laws: a+(b·c)=(a+b)·(a+c),

a·(b+c)=a·b+a·c

  • Identity laws: a+0=a, a·1=a
  • Complement laws: a+a’=1, a·a’=0
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Switching Algebra

  • Boolean Algebra: multiple-valued logic, i.e. each variable

have multiple values.

  • Switching Algebra: binary logic, i.e. each variable can be

either 1 or 0.

  • Boolean Algebra ≠ Switching Algebra

BB Boolean Algebra Switching Algebra

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Starting with basic gates we want to build more complex logic circuits Problem Specification: Words Truth table Boolean (switching) expression Reduced Boolean expression

a b c d e Synthesis

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Example: Half Adder

a b carry sum 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0

Truth Table a b Sum Carry

Specifying Logic Problems: Truth tables

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a b carry sum 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0

Truth Table

How do we go from Truth table to a Boolean Equation? Sum (a, b) = a’b + ab’ Carry (a, b) = ab

Switching Expressions or Boolean Equation:

Switching Function

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Need Some Definitions

  • Complement: variable with a bar over it

A, B, C

  • Literal: variable or its complement

A, A, B, B, C, C

  • Implicant: product of literals

ABC, AC, BC

  • Implicate: sum of literals

(A+B+C), (A+C), (B+C)

  • Minterm: product that includes all input variables

ABC, ABC, ABC

  • Maxterm: sum that includes all input variables

(A+B+C), (A+B+C), (A+B+C)

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Logic circuit vs. Boolean Algebra Expression

Schematic (circuit) Diagram: 5 primary inputs 4 components 9 signal nets 12 pins

ab + cd a b c d e cd ab y=e (ab+cd)

Boolean Algebra: 5 literals 4 operators

Obj: min #terms min #literals

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A B carry sum Min term Max term 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0

Specifying input combinations as Boolean expressions

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A B carry sum Min term Max term 0 0 0 0 A’B’ A+B 0 1 0 1 A’B A+B’ 1 0 0 1 AB’ A’+B 1 1 1 0 AB A’+B’

Sum of Product Canonical Form

I. sum(A,B) =

  • II. carry(A,B)=
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PI Q: Is the expression for sum obtained in the previous slide expected and correct?

  • A. No, it is not expected and it is not correct. It should have been

S= A+B

  • B. It might not be expected but it is correct
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A B carry sum Min term Max term 0 0 0 0 m0 M0 0 1 0 1 m1 M1 1 0 0 1 m2 M2 1 1 1 0 m3 M3

Sum of Product Canonical Form

I. sum(A,B) =

  • II. carry(A,B)=
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A B carry sum Min term Max term 0 0 0 0 A’B’ A+B 0 1 0 1 A’B A+B’ 1 0 0 1 AB’ A’+B 1 1 1 0 AB A’+B’

Product of Sum Canonical Form

I. sum(A,B) =

  • II. carry(A,B)=
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A B carry sum Min term Max term 0 0 0 0 m0 M0 0 1 0 1 m1 M1 1 0 0 1 m2 M2 1 1 1 0 m3 M3

Product of Sum Canonical Form

I. sum(A,B) =

  • II. carry(A,B)=
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PI Q: The SOP form seems to be more compact than the

POS form. Is there a situation where we would prefer the latter over the former to express the switching function?

  • A. Yes, when the output is 1 more often than 0
  • B. Yes, when the output is 0 more often than 1
  • C. No, we always prefer the SOP form because its

more compact

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PI Q: How can we check if our switching expression in

POS and SOP canonical forms is correct?

  • A. We can’t – just listen to the professor and follow
  • B. Regenerate the truth table from the switching

expression

  • C. Derive one canonical form from the other using

Boolean Algebra

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Re-deriving the truth table

Switching Expressions: Sum (A,B) = A’B + AB’ Carry (A, B) = AB Ex: Sum (0,0) = 0’.0 + 0.0’ = 0 + 0 = 0 Sum (0,1) = 0’1 + 0.1’ = 1 + 0 = 1 Sum (1,1) = 1’1 + 1.1’ = 0 + 0 = 0

a b sum a b carry

Logic circuit for half adder:

A B carry sum 0 0 0 0 1 0 1 0 0 1 1 1

Truth Table

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The SOP and POS forms don’t usually give the

  • ptimal circuit or the simplest Boolean expression
  • f the switching function

To optimize the circuit, simplify the Boolean expression using:

  • 1. Boolean Algebra axioms and theorems
  • 2. Karnaugh Maps (next lecture)

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  • 1. B = 0 if B not equal to 1
  • 2. 0’ = 1
  • 3. 1.1 = 1
  • 4. 0.1 = 0
  • 5. a+0=a, a.1=a Identity law
  • 6. a+a’=1, a.a’=0 Complement law

Axioms of Boolean Algebra

1-<29>

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  • I. Commutative Law: A + B = B +A

AB = BA

  • II. Distributive Law

A(B+C) = AB + AC A+BC = (A+B)(A+C) A B C A C A B A B C A C A B

Theorems of Boolean Algebra

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III Associativity (A+B) + C = A + (B+C) (AB)C = A(BC) C A B A B C C A B A B C IV: Consensus Theorem: AB+B’C+AC = AB+B’C

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PI Q: Which term in AB’+AC+BC can be deleted?

  • A. AB’
  • B. AC
  • C. BC
  • D. None of the above

1-<32>

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Proof of consensus Theorem using Boolean Algebra

AB+B’C+AC = AB+B’C

1-<33>

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  • V. DeMorgan’s Theorem
  • Y = AB = A + B
  • Y = A + B = A B

A B Y A B Y A B Y A B Y

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Bubble Pushing

  • Pushing bubbles backward (from the output) or forward

(from the inputs) changes the body of the gate from AND to OR or vice versa.

  • Pushing a bubble from the output back to the inputs puts

bubbles on all gate inputs.

  • Pushing bubbles on all gate inputs forward toward the output

puts a bubble on the output and changes the gate body.

A B Y A B Y

A B Y A B Y

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Example of transforming circuits using bubble pushing

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Shannon’s Expansion

  • Shannon’s expansion assumes a switching algebra

system

  • Divide a switching function into smaller functions
  • Pick a variable x, partition the switching function

into two cases: x=1 and x=0 – f(x,y,z,…)= xf(x=1,y,z,…) + x’f(x=0,y,z,…)

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Shannon’s expansion

  • Shannon’s expansion:

– f(x)=xf(1)+x’f(0) – f(x,y)=xf(1,y)+x’f(0,y) – f(x,y,z,…)=xf(1,y,z,…)+x’f(0,y,z,…)

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Shannon’s Expansion: Example

PIQ: f(x,y,z)=xf(?,y,z)+x’f(?,y,z)

  • A. ?=0
  • B. ?=1
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Shannon’s Expansion: Example

PI Q f(x,y)=(x+f(?,y))(x’+f(?,y))

  • A. ?=0
  • B. ?=1.
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Proof of Shannon’s Expansion

f(x,y)=(x+f(0,y))(x’+f(1,y)) {Enumerative induction}

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Shannon’s Expansion

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Reduction of Boolean Expression

  • AB+AC+B’C

=AB+B’C

  • (A+B)(A+C)(B’+C)

=(A+B)(B’+C)

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To prove the reduction using (1) Boolean algebra, (2) Logic simulation and (3) Shannon’s expansion (exercise)

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Summary: Switching Algebra and Karnaugh Map

  • Shannon’s expansion and consensus

theorem are used for logic optimization

  • Shannon’s expansion divides the problem

into smaller functions

  • Consensus theorem finds common terms

when we merge small functions

  • Karnaugh map mimics the above two
  • perations in two dimensional space as a

visual aid.

1-<46>

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We are in a position to build a circuit to do n-bit Binary Addition

5 + 7 1 2 Carry Sum 1 1 1 1 0 1 + 1 1 1 1 1 0 0 Carryout Sums Carry bits 5 7 12

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Binary Addition: Hardware

  • Half Adder: Two inputs (a,b) and two
  • utputs (carry, sum).
  • Full Adder: Three inputs (a,b,c) and two
  • utputs (carry, sum).

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Full Adder

Id a b cin carry sum 0 0 0 0 0 0 1 0 0 1 0 1 2 0 1 0 0 1 3 0 1 1 1 0 4 1 0 0 0 1 5 1 0 1 1 0 6 1 1 0 1 0 7 1 1 1 1 1

Truth Table a b Sum Carry

Cin

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Minterm and Maxterm

Id a b cin carryout 0 0 0 0 0 a+b+c 1 0 0 1 0 a+b+c’ 2 0 1 0 0 a+b’+c 3 0 1 1 1 a’ b c 4 1 0 0 0 a’+b+c 5 1 0 1 1 a b’c 6 1 1 0 1 a b c’ 7 1 1 1 1 a b c minterm maxterm

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f1(a,b,c) = a’bc + ab’c + abc’ + abc f2(a,b,c) = (a+b+c)(a+b+c’)(a+b’+c)(a’+b+c) f1(a, b, c) = m3 + m5 + m6 + m7 = Sm(3,5,6,7) f2(a, b, c) = M0M1M2M4 = PM(0, 1, 2, 4)

PI Q: Is f1 = f2?

  • A. Yes
  • B. No
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PIQ: Reduce using Boolean algebra theorems Carry(A,B,C)=A’BC+AB’C+ABC’+ABC

  • A. A’BC+AB’C+AB
  • B. A’BC+AC+AB
  • C. AB+AC+CA
  • D. ABC
  • E. Cannot be reduced further

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A’BC+AB’C+ABC’+ABC

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f1(a,b,c) = a’bc + ab’c + abc’ + abc = ab +c(b +a)

Circuit for Full Adder Carry out

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Next Lecture Reading

[Harris] Chapter 2, Section 2.5, 2.7