Bigger Units of Combinational Logic • Gates useful but fairly low level • Easier to constructs circuits with higher-level building blocks instead: IC220 – Combinational Logic Slide Set #A2: Combinational and • Multiplexors (mux) • Decoders Sequential Logic – (later) Sequential Logic • Registers (Appendix A) • Arithmetic unit (ALU) • What is this an example of? 1 2 Multiplexors (mux) Demo Multiplexor – Example Usage x0 x1 x2 Adder x30 x31 3 4
EX: A-31 to A-32 Multiplexor – 1-bit version Multiplexor – Wider version • 32 bit wide, 2-way Mux: • Think of a mux as a selector • S selects one input to be the output • Pictures don’t always show the width (especially if 32 bits) • N-way mux has – # inputs: – # selector lines (S): – # outputs: • Implementation? 5 6 Combinational vs. Sequential Logic • Combinational Logic – output depends only on End of Combinational Logic • Sequential Logic – output depends on: • Previous inputs are stored in “state elements” – __________ determines when an element is updated • State elements will involve use of feedback in circuit – Not permitted in combinational circuits 7 8
Clocks and State Elements Demo: Latch vs. Flip-flop • Clock Frequency is the __________ of _______________. • When should updates occur to state elements? – Edge – change state when – Level – change state when 9 10 EX: A-41 D-Type Flip Flop Truth Tables Next State Tables • New kind of input: • State only changes • Otherwise… remembers previous state • Abstraction: D Q Q t A B Q t+1 0 0 0 0 C 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 Q-flipflop 11 12
EX: A-51 State Diagrams Finite State Machines • State = Contents of memory Q t A B Q t+1 • Can use state diagrams to express more complex sequential logic. 0 0 0 0 • Example: Candy Machine • Diagrams are a tool to 0 0 1 1 – Inputs: N (nickel received), D (dime received) represent ALL transitions 0 1 0 1 – Outputs: C (dispense candy), R (give refund) from one state to another 0 1 1 1 – Should dispense candy after 15 cents deposited, + refund if – What causes state 1 0 0 0 overpaid. Then await next customer. changes? 1 0 1 0 • We’ll use Moore machine – output depends only on 1 1 0 0 • Example: 1 1 1 1 • What states do we need? Q=0 Q=1 13 14 Example: Candy Machine Implementing Finite State Machines Inputs: (N)ickel, (D)ime Outputs: (C)andy, (R)efund • Rectangles = • Ovals = • We don’t always show the clock for registers/memory diagrams, but will be implicit 15 16
EX: A-52 to A-53 FSM Example 17 (space for notes) 5-input K-maps?? Combining Combinational and Sequential Logic • Finite State Machine was our first example of this • Two general patterns: 1. State Machine 2. Pipeline • In either case, have important timing concerns – Output of combinational logic block may oscillate before settling – Clock cycle time must be long enough so combo-logic settles before the sequential logic (state) reads the new value – State elements ensure that combo-logic inputs remain stable 19 20
Memory Appendix A Summary • Why so many types? • Truth tables and Gates • Basic types: – AND, OR, NOT, NOR, NAND, XOR – RAM “random access memory” (read/write) • Boolean Algebra • Main memory – Distributive, DeMorgan’s, Inverse, Identity, etc • Volatile • Combinational Logic • Types: – Circuits – Design, reduction / minimization, K-maps – SRAM – async, sync, pipeline burst, cache; – Multiplexor SRAM based on? • Sequential Logic – Flip/flops – DRAM – M, FPM, EDO, burst EDO, sync, DR, DDR DRAM based on? – Clock & state diagrams – Finite State Machines – ROM (read only) • Memory • Small – RAM vs ROM, SRAM vs. DRAM • Stores critical operating instruction (BOOT strap) • Non-volatile • Common in embedded system (toys, cameras, printers, etc) • Types: PROM, EPROM, EEPROM, flash memory 21 22
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