“Real World” Example • Buzzer Feature for a Car • Should Buzz when IC220 1. the engine is on, the door is closed, and the seat belt is unbuckled Slide Set #A2: Combinational and 2. the engine is on, the door is open • What are our input(s)? Sequential Logic (Appendix A) • What are our output(s)? 1 2 (extra space) Check Yourself • Could you have filled in the truth table? • Could you have filled in the K-Map? • Can you use the K-Map to minimize the equation? • Can you draw the circuit? 4
Bigger Units of Combinational Logic Multiplexor – Example Usage • Gates useful but fairly low level $t0 • Easier to constructs circuits with higher-level building blocks instead: $t1 – Combinational Logic $t2 • Multiplexors (mux) • Decoders – (later) Sequential Logic Adder • Registers • Arithmetic unit (ALU) • What is this an example of? $a2 $a3 5 6 EX: A-31 to A-32 Multiplexor – 1-bit version Multiplexor – Wider version • 32 bit wide, 2-way Mux: EN S1 S0 D3 D2 Q D1 D0 • Think of a mux as a selector • Pictures don’t always show the width • S selects one input to be the output (especially if 32 bits) • N-way mux has – # inputs: – # selector lines (S): – # outputs: • Implementation? 7 8
Combinational vs. Sequential Logic • Combinational Logic – output depends only on End of Combinational Logic • Sequential Logic – output depends on: • Previous inputs are stored in “state elements” – __________ determines when an element is updated • State elements will involve use of feedback in circuit – Not permitted in combinational circuits 9 10 Truth Tables Next State Tables Clocks and State Elements • New kind of input: • Clock Frequency is the __________ of _______________. • When should updates occur to state elements? – Edge – change state when A B Q t Q t+1 – Level – change state when 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 11 12
D-Type Flip Flop Exercise – Complete the timing diagram below • State only changes • Otherwise… remembers previous state • Abstraction: D Q C Q-FlipFlop ( falling edge triggered) Q-FlipFlop ( rising edge triggered) Q-flipflop 13 14 State Diagrams Finite State Machines • State = Contents of memory • Can use state diagrams to express more complex sequential logic. • Example: Candy Machine • Diagrams are a tool to – Inputs: N (nickel received), D (dime received) represent ALL transitions from one state to another – Outputs: C (dispense candy), R (give refund) – Should dispense candy after 15 cents deposited, + refund if – What causes state overpaid. Then await next customer. changes? • We’ll use Moore machine – output depends only on • Example for D Flip-Flop: • What states do we need? Q=0 Q=1 15 16
EX: A-51 to A-52 Example: Candy Machine Implementing Finite State Machines Inputs: (N)ickel, (D)ime Outputs: (C)andy, (R)efund • Squares = • Circles = • We don’t always show the clock for registers/memory diagrams, but will be implicit 17 18 FSM Example Combining Combinational and Sequential Logic • Finite State Machine was our first example of this • Two general patterns: 1. State Machine 2. Pipeline • In either case, have important timing concerns – Output of combinational logic block may oscillate before settling – Clock cycle time must be long enough so combo-logic settles before the sequential logic (state) reads the new value – State elements ensure that combo-logic inputs remain stable 19 20
Registers and Register Files Writes • To control almost ANY kind of write (to memory or register • Registers store data (bits) (i.e. have memory) file), we need to specify 3 things: – Each register = 1. • Register files contain: – Set of registers – Logic for read/write 2. • ARM register file has how many registers? 3. • How does it store data? • How does it know which register to access? 21 22 Memory Appendix A Summary • Why so many types? • Truth tables and Gates • Basic types: – AND, OR, NOT, NOR, NAND, XOR – RAM “random access memory” (read/write) • Boolean Algebra • Main memory – Distributive, DeMorgan’s, Inverse, Identity, etc • Volatile • Combinational Logic • Types: – Circuits – Design, reduction / minimization, K-maps – SRAM – async, sync, pipeline burst, cache; – Multiplexor SRAM based on? • Sequential Logic – Flip/flops – DRAM – M, FPM, EDO, burst EDO, sync, DR, DDR DRAM based on? – Clock & state diagrams – Finite State Machines – ROM (read only) • Register files • Small • Memory • Stores critical operating instruction (BOOT strap) – RAM vs ROM, SRAM vs. DRAM • Non-volatile • Common in embedded system (toys, cameras, printers, etc) • Types: PROM, EPROM, EEPROM, flash memory 23 24
Recommend
More recommend
