Kanto: FPGA Audio Player and Visualizer Kavita Jain-Cocks Zhehao - PowerPoint PPT Presentation

Kanto: FPGA Audio Player and Visualizer Kavita Jain-Cocks Zhehao Mao Amrita Mazumdar Darien Nurse Jonathan Yu May 16, 2013

Project Overview ◮ Objective: Design and implement an audio player with frequency visualization. ◮ Hardware: Handles audio output and frequency visualization ◮ Software: Handles user interaction and system initialization

High-Level Overview NIOS II everywhere PLL Avalon PS2 SD Buffer Keyboard Conductor SD Card Audio VGA Speaker FFT Visualizer Controller Buffer Display Output SD Card

SD Controller CMD8 CMD0 Error illegal? yes no ACMD41 no ready? yes CMD58 yes no Ready start? CMD17

Audio Buffer From SD Card To Audio Codec WM8731 Audio RAM Interface

FFT Equations N − 1 x n e − 2 π j � N nk X k = (1) n = 0 � E k + e − 2 π j N k O k if k < N / 2 X k = (2) E k − N / 2 − e − 2 π j N ( k − N / 2 ) O k − N / 2 if k ≥ N / 2 .

FFT Top-Level DFT MUX Time Domain Frequency RAM Domain RAM DFT MUX DFT Recomb ROM Controller MUX Recomb Recomb Recomb Recomb ROM-16 ROM-32 ROM-64 ROM-128

DFT Unit +1 n F S M x o ROM + c u o i t n x n + p +1 t p u r u t k o t l l e Sum r

Recombination Unit write addr even k Complex Frequency low Add Domain odd +1 RAM Complex high Subtract = Complex N Mult ROM FSM write done

Complex Multiplier ax * ay - az ax x bx * by bx ax * by x + bz ay * bx ay x by x

Visualizer reset_data FSM data_req_addr clk_50 data Data Array of size 16 31:0 19:0 clk_25 red Draw to VGA green blue

Conductor initial sd_ready = 1 / nios_play = 0 fft_counter <= 11 / ~ nios_play = 1 / playing blockaddr++ resume ~ / fft_done_last = 0 fft_counter <= 00 fft_done = 1 / ~ cpuctrl ~ / ~ ~ / ~ ab_swapped = 1 nios_readblock = 1 / / fft_counter++ blockaddr <= nios_addr fft_end blockaddr++ ~ / ~ block_end trigger_sd wait_sd sd_ready = 1 / ~

Software — Track Selection track_table[0] Track 1 Address Track 1 Title track_titles[0] track_table[1] Track 1 Address track_titles[1] Track 1 Title track_table[N] Audio End 0 0 0 0

The Hard Parts ◮ Interfacing to external hardware (SD card, audio codec, visualizer) ◮ Reducing Hardware Usage ◮ Timing Issues

Design Changes ◮ Removal of SRAM ◮ Adding Software Control ◮ Display Changes

Lessons Learned ◮ Connect components early ◮ Implement modularized design ◮ Testbench everything ◮ Clearly define milestones ◮ Communicate often and clearly with each other and the adviser