Open Source FPGA Toolchain FPGA LSE Summer Week 2015 iCE40 Flow - - PowerPoint PPT Presentation

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Open Source FPGA Toolchain FPGA LSE Summer Week 2015 iCE40 Flow - - PowerPoint PPT Presentation

Apr 02, 2023 19 likes •269 views

Open Source FPGA Toolchain Vincent Gatine Introduction Open Source FPGA Toolchain FPGA LSE Summer Week 2015 iCE40 Flow Conclusion Vincent Gatine EPITA July 15, 2015 Vincent Gatine (EPITA) Open Source FPGA Toolchain July 15, 2015 1

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

Open Source FPGA Toolchain

LSE Summer Week 2015 Vincent Gatine

EPITA

July 15, 2015

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

What is a FPGA?

Field Programmable Gate Array

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

Usage

SDR (BladeRF, USRP) Pebble Time watch LSE-PC Prototypage

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

FPGA manufacturers

Majors (80% market share): Altera, Xilinx Minors: Lattice, Blue Silicon, Microsemi,. . .

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

How to program a FPGA?

Hardware Description Language (Verilog, VHDL) Verilog example module toplevel(input clock, input reset); reg cnt; always @ (posedge reset or posedge clock) if (reset) cnt <= 0; else cnt <= cnt + 1; endmodule

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

Synthesis tools

Quartus by Altera Diamond (or Icecube 2) by Lattice

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

Why would we want an open source toolchain?

Quartus > 13.1 can’t program (old) cyclones Linux support? Knowledge Why not?

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

iCE40

Produced by Lattice semiconductor Low cost, low power FPGA Cheap boards and well documented Perfect platform to do some reverse engineering

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

Project Icestorm

iCE40 bitstream RE by Clifford Wolf and Mathias Lasser Aim to document iCE40 programming bits Many tools to pack, unpack, explain structures

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

iCE40 Structure

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

PLB Structure

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

Routing

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

IntraPLB routing

Local tracks Each PLB has 32 local tracks Organized in 4 groups of 8 wires each

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

InterPLB routing

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

InterPLB routing

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

Programming process

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

Yosys

Yosys Open Synthesis Suite Created by Clifford Wolf HDL to RTL synthesis tool

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

Yosys

Example # read design read_verilog mydesign.v # generic synthesis synth -top mytop # write synthesized design write_verilog synth.v

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

Arachne-pnr

Place and route software aimed at iCE40LP/HX1K Written by Cotton Seed Takes RTL and constraints files (pin assignation) Output plain text cells configurations constraints.pcf set_io a 1 set_io b 10 set_io y 11

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

Icestorm

Icepack: plain text to bitstream Iceunpack: bitstream to plain text IceProg: Program board

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

Example

and.v module top (input a, b, output y); assign y = a & b; endmodule and.pcf set_io a 1 set_io b 10 set_io y 11

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

Example

.io_tile 0 14 IOB_1 PINTYPE_0 IoCtrl IE_1 IoCtrl REN_0 buffer io_1/D_IN_0 span4_horz_28 .logic_tile 1 11 LC_2 0000000001010101 0000 buffer local_g1_4 lutff_2/in_3 buffer local_g3_1 lutff_2/in_0 buffer neigh_op_lft_4 local_g1_4 buffer sp4_r_v_b_41 local_g3_1

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

Conclusion

This is still a proof of concept

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

Questions?

Questions?

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Open Source FPGA Toolchain Vincent Gatine Introduction FPGA iCE40 Flow Conclusion

Thanks!

mail: nurelin@lse.epita.fr Links Yosys arachne-pnr icestorm

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