introduction to transistor amplifiers concept biasing
play

Introduction to Transistor Amplifiers: Concept & Biasing - PowerPoint PPT Presentation

Introduction to Transistor Amplifiers: Concept & Biasing Lecture notes: Sec. 5 Sedra & Smith (6 th Ed): Sec. 5.4-5.4.6 & 6.3-6.4 Sedra & Smith (5 th Ed): Sec. 4.4-4.4.6 & 5.3-5.4 F. Najmabadi, ECE65, Winter 2012 Foundation of


  1. Introduction to Transistor Amplifiers: Concept & Biasing Lecture notes: Sec. 5 Sedra & Smith (6 th Ed): Sec. 5.4-5.4.6 & 6.3-6.4 Sedra & Smith (5 th Ed): Sec. 4.4-4.4.6 & 5.3-5.4 F. Najmabadi, ECE65, Winter 2012

  2. Foundation of Transistor Amplifiers (1)  A voltage amplifier requires  MOS transfer function is NOT v o /v i = const. (2 examples are linear shown below)  In saturation, however, transfer  v o /v i can be negative (minus sign function looks linear (but shifted) represents a 180 o phase shift) F. Najmabadi, ECE65, Winter 2012

  3. Foundation of Transistor Amplifiers (2)  Let us consider the response if NMOS remain in saturation at all times: o v GS should be a combination of a constant value ( V GS ) and a signal ( v gs ). = + v V v GS GS gs F. Najmabadi, ECE65, Winter 2012

  4. The response to a combination of v GS = V GS + v gs can be found from the transfer function F. Najmabadi, ECE65, Winter 2012

  5. Response to the signal appears to be linear!  Response ( v o = v DS ) is also made of a constant part ( V DS ) and a signal response part ( v ds ).  Constant part of the response, V DS , is ONLY related to V GS , the constant part of the input (Q point on the transfer function of previous slide). o i.e., if v gs = 0 , then v ds = 0  The shape of the time varying portion of the response ( v ds ) is similar to v gs . o i.e., v ds is proportional to the input signal, v gs  While overall response is non-linear, response to the signal appears to be linear! F. Najmabadi, ECE65, Winter 2012

  6. Although the overall response is non-linear, the transfer function for the signal is linear! v ds Constant: Signal and Bias response v GS = V GS + v gs v DS = V DS + v ds v gs i D = I D + i d Linear relationship among Non-linear these parameters relationship among these parameters F. Najmabadi, ECE65, Winter 2012

  7. An Analogy: How much water is under the keel of a boat? Added Weight Response (signal) h b Boat H b = H B H B H b Pool Bias Bias + signal  Total Height, H b = Bias (H B ) + response to the added weight (h b )  Complicated correlation between the total height, H b , and the weight of the boat.  Simple correlation between h b and the added weight F. Najmabadi, ECE65, Winter 2012

  8. An Analogy (2) Added Weight (signal) h b H B H b  Bias: V GS , V DS , I D  Bias: zero added weight & H B  Bias + Signal: v GS , v DS , i D  Bias + Signal: total weight & H b  Signal & response: v gs , v ds , i d  Signal & response: added weight & h b  Non-linear correlations among Bias + Signal: v GS , v DS , i D  Simple (and linear) correlation between signal and response to the signal: v gs , v ds , i d F. Najmabadi, ECE65, Winter 2012

  9. Important Observations!  Signal: We want the response of the circuit to this input.  Bias: State of the system when there is no signal (current and voltages in all elements). o Bias is constant in time (may vary very slowly compared to the signal) o Purpose of the bias is to ensure that MOS is in saturation at all times.  Response of the circuit (and elements within) to the signal is different than the response of the circuit and its elements to Bias (or to Bias + signal): o Different transfer function for the circuit o Different iv characteristics for elements, i.e. relationships among v gs , v ds , i d are different than relationships among v GS , v DS , i D . Above observations & conclusions equally apply to a BJT in the active mode! F. Najmabadi, ECE65, Winter 2012

  10. Transistor Amplifier Development Bias & Signal Bias Signal only = (Bias + Signal) - Bias + ? MOS : , , , MOS : , , , V V I MOS : , , , v v i v v i GS DS D gs ds d GS DS D = + ( ,...) v V v GS GS gs = + : , R V I : , : R v i R v V v D R R D r r D R R r = + ..... ..... i I i R R r ..... F. Najmabadi, ECE65, Winter 2012

  11. Issues in developing a transistor amplifier: 1. Establish a Bias point (bias is the state of the system when there is no signal). Stable and robust bias point should be resilient to variations in β, o µ n C ox (W/L),V t , … due to temperature and/or manufacturing variability. Find the iv characteristics of the elements for the signal (which 2. can be different than their characteristics equation for bias). This will lead to different circuit configurations for bias versus signal: o Signal circuit 3. Compute circuit response to the signal & develop transistor amplifier circuits F. Najmabadi, ECE65, Winter 2012

  12. Transistor Biasing (Bias is the state of the circuit when there is no signal) 1. Purpose: BJT should be in active (or MOS should in saturation) at all times. Bias point impacts the small-signal parameters. o Bias point impacts how large a signal can be amplified o Bias point should be resilient to variations in β, µ n C ox (W/L),V t , … 2. due to temperature and/or manufacturing variability. F. Najmabadi, ECE65, Winter 2012

  13. BJT biasing with Base Voltage (Fixed Bias) − = + BE KVL : V I R V BB B B BE − V V = 0 BB D I B R B − V V = β = β 0 BB D I I C B R B − = + CE KVL : V I R V CC C C CE β R = − − C ( ) V V V V 0 CE CC BB D R B * Typically V BB = V CC in order to reduce the need for additional reference voltages. F. Najmabadi, ECE65, Winter 2012

  14. Exercise 1: Find R C and R B such that BJT would be in active with I C = 25 mA, V CE = 5 V. ( V CC = 15 V, Si BJT with β = 100 and V A = ∞ ). > = ≥ 0 = BJT is in Active since 0 and 5 0 . 7 V I V V C CE D = β = / 0 . 25 mA I I B C − = + = × − + 3 BE KVL : 1 5 0 . 25 10 0 . 7 I R V R B B BE B = 57 . 2 k R B − − = + = × + 3 CE KVL : 1 5 25 10 5 I R V R C C CE C = Ω 400 R C F. Najmabadi, ECE65, Winter 2012

  15. Exercise 2: Consider the circuit designed in Exercise 1 ( R C = 400 , R B = 57.2 k, V CC = 15 V ). Find the operating point of BJT if β = 200. Assume BJT is in Active : = > ≥ 0 . 7 V, 0 and 0 . 7 V V I V BE C CE − = + = × + 3 BE KVL : 1 5 57 . 2 10 0 . 7 I R V I B B BE B = 0 . 25 mA I B = β = 50 mA I I C B − − = + = × × + 3 CE KVL : 1 5 50 10 400 I R V V C C CE CE = − 5 V V CE Note, compared to Exercise 1: BJT in saturation!  I B is the same.  I C increased.  V CE decreased. F. Najmabadi, ECE65, Winter 2012

  16. Why biasing with base voltage (fixed bias) does not work?  Changes in BJT β changes the bias point drastically. o BJT can end up in saturation or in cut-off easily. − V V =  In fixed bias, I B is set through 0 BB D I B R B  BJT β then sets I C = β I B ( I C changes with β ). o CE circuit then sets V CE .  But, requirements for BJT in active are on I C and V CE and NOT on I B o I C > 0 , V CE > V D 0  To make bias point independent of changes in β , the bias circuit should “set” I C and NOT I B ! F. Najmabadi, ECE65, Winter 2012

  17. Biasing with Emitter Degeneration Requires a resistor in the emitter circuit! − = + + BE KVL : V I R V I R BB B B BE E E   R − = + B V V I  R  0 β + BB D E E   1 << β + If : ( 1 ) R R B E − ≈ V V I R BB D 0 E E − V V Independent of β ! ≈ ≈ 0 BB D I I C E R E << β + Condition of means that the voltage drop across R B is small ( 1 ) R R B E and the bias voltage V BB – V D 0 appears across R E , setting I E ≈ I C . F. Najmabadi, ECE65, Winter 2012

  18. Emitter resistor provides negative feedback! = + + V I R V I R BB B B BE E E ∝ / V BE V I e T B Negative Feedback: Independent of β ! β BE junction BE -KVL o If I C ≈ I E ↑ (because β ↑ ) , V BE ↓ I B ↓ I C ≈ I E ↓ β BE junction BE -KVL o If I C ≈ I E ↓ (because β ↓ ) , V BE ↑ I B ↑ I C ≈ I E ↑ F. Najmabadi, ECE65, Winter 2012

  19. Requirements for Biasing with Emitter Degeneration  Requires a resistor in the emitter circuit.  The bias voltage V BB – V D 0 should appear across R E to set I E ≈ I C : − = + V V I R I R BB BE B B E E << ⇒ << β + 1. ( 1 ) I R I R R R B B E E B E << β + ( 1 ) R R o We need to set to ensure min B E that this condition is always satisfied! 2. V BE ≈ V D 0 . In reality, V BE = V D 0 ± ∆ V BE with ∆ V BE ≈ 0.1 V >> 0.1 V o We need to set or I E R E ≥ 1 V I E R E F. Najmabadi, ECE65, Winter 2012

  20. Emitter Degeneration Bias with a voltage divider Real Circuit = || R R R B 1 2 R = × Voltage Divider 2 V V + BB CC R R 1 2 F. Najmabadi, ECE65, Winter 2012

Download Presentation
Download Policy: The content available on the website is offered to you 'AS IS' for your personal information and use only. It cannot be commercialized, licensed, or distributed on other websites without prior consent from the author. To download a presentation, simply click this link. If you encounter any difficulties during the download process, it's possible that the publisher has removed the file from their server.

Recommend


More recommend