Transistor Amplifiers Lecture notes: Sec. 6 Sedra & Smith (6 th - - PowerPoint PPT Presentation

Transistor Amplifiers

Lecture notes: Sec. 6 Sedra & Smith (6th Ed): Sec. 5.6, 5.8, 6.6 & 6.8 Sedra & Smith (5th Ed): Sec. 4.6, 4.8, 5.6 & 5.8

• F. Najmabadi, ECE65, Winter 2012

How to add signal to the bias

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Bias & Signal vGS = VGS + vgs Bias & Signal vDS = VDS + vds

• 1. Direct Coupling
• Use bias with 2 voltage supplies
• For the first stage, bias such that

VGS = 0

• For follow-up stages, match bias

voltages between stages

• Difficult biasing problem
• Used in ICs
• Amplifies “DC” signals!
• 2. Capacitive Coupling
• Use a capacitor to separate bias

voltage from the signal.

• Simplified biasing problem.
• Used in discrete circuits
• Only amplifies “AC” signals

Capacitive coupling is based on the fact that capacitors appear as open circuit in bias

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• At a high enough frequency, Zc = 1/ (ωC), becomes small (effectively, capacitors

become short circuit).

• Mid-band parameters of an Amplifier.*
• At low frequencies, Zc cannot be ignored. As Zc depends on frequency, amplifier is

NOT linear (for an arbitrary signal) for these low frequencies.

• Capacitors introduce a lower cut-off frequency for an amplifier (i.e., amplifier

should be operated above this frequency).

In ECE102, you will see that transistor amplifiers also have an “upper” cut-off frequency

Real Circuit Bias Circuit Signal Circuit

What are amplifier parameters?

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: Gain Voltage

i

• v

v v A =

∞ →

=

L

R i

• vo

v v A : Gain loop

• Open

: Resistance Input

i i i

i v R = : Amplifier

• f

Resistance Output

→

=

i

v

• i

v R

Output resistance is the Thevenin resistance between the output terminals!

: circuit the

• f

Resistance Output

→

=

sig

v

• ut

i v R

Observations on the amplifier parameters

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• Avo is the maximum possible gain
• f the amplifier.
• Value of Ro is important.
• For Ro << RL , Av ≈ Avo
• For Ro = RL , Av = 0.5 Avo
• For Ro >> RL , Av ≈ 0
• Prefer “small” Ro

vo

• L

L i

• v

A R R R v v A + = =

• Value of Ri is important.
• For Rsig << Ri , vi ≈ vsig
• For Rsig = Ri , vi = 0.5 vsig
• For Rsig >> Ri , vi ≈ 0
• Prefer “large” Ri

sig i i sig i

R R R v v + =

v sig i i i

• sig

i sig

• A

R R R v v v v v v A + = × = = : Gain Overall

How to Solve Amplifier Circuits

1. Find Bias and Signal Circuits. 2. Bias circuit (signal = 0):

• Capacitors are open circuit.
• Use transistor large-signal model to find the bias point.
• Use bias parameters to find small-signal parameters (rπ , gm , ro ).

3. Signal Circuit (IVS becomes short, ICS becomes open circuit):

• Assume capacitors are short to find mid-band amplifier parameters.
• Replace diodes and/or transistors with their small-signal model.
• Solve for mid-band amplifier parameters (Av , Ri , Ro ).
• For most circuits, we can use fundamental amplifier configurations,

elementary R forms instead of solving signal circuits.

• Include impedance of capacitors to find the lower cut-off frequency
• f the amplifier.
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• F. Najmabadi, ECE65, Winter 2012

Example 1: Draw the small-signal equivalent of the circuit below (assume capacitors are short for small signal).

IVS → 0 R remains Caps short Ground at the bottom Replace MOS with its small signal model

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Example 2: Draw the small-signal equivalent of the circuit below (assume capacitors are short for small signal).

Flip PMOS IVS → 0 Caps short Ground at the bottom (100k || 33k = 24.8 k) Replace MOS with its small signal model

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Example 3: Draw the small-signal equivalent of the circuit below (assume capacitors are short for small signal).

ICS → 0 (This makes ICS an open circuit) IVS → 0 Caps short Replace MOS with its small signal model

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Basic MOS Amplifier Configurations

We are considering only signal circuit here!

Possible MOS amplifier configurations

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Same as Common Gate (vi does not change) Common-Source Common-Gate Common-Drain Common-Source with Rs Not Useful

PMOS configurations are the same as those of NMOS

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Common-Source Common-Gate Common-Drain Since PMOS has the same signal model, configurations and results are exactly the same

Common Source Configuration (Gain)

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Signal Circuit: Signal Circuit with MOS SSM:

• m

vo L

• m

i

• v

L

• gs

m

• r

g A R r g v v A R r v g v − = ′ − = = ′ − = ) || ( ) || (

Relevant circuit for Gain calculation

By KCL

Common Source Configuration (Ri)

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∞ = = =

i i i i

i v R i

Signal Circuit with MOS SSM: Relevant circuit for Ri calculation

Common Source Configuration (Ro)

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• r

R =

Current source becomes open circuit

Signal Circuit with MOS SSM: Relevant circuit for Ro calculation (set vi = 0)

Common Source with Source Resistor

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∞ = = ⇒ =

i i i i

i v R i

Input Resistance

Small Signal Circuit: Signal Circuit with MOS SSM:

Common Source with Source Resistor (Gain)

• F. Najmabadi, ECE65, Winter 2012
• m

vo

• L

S m L m v L S

• m
• L
• m

i

• v

r g A r R R g R g A R R r g r R r g v v A − = ′ + + ′ − ≈ ′ + + + ′ − = = / 1 ) 1 ( ) ( ) ( = − + − + ′ = − − − + − =

S i m

• S
• L
• S

i m

• S

S S S i gs

v v g r v v R v v v g r v v R v v v v Node voltage method: Node vS Node vo

Relevant circuit for Gain calculation

Common Source with Source Resistor (Ro)

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) 1 (

S

• m
• R

r g r R + + =

S

• m
• x

S S S m

• x

S S S S gs

R r g r v R v v g r v v R v v v ) 1 ( ) ( + + = = − − − + − = Node voltage method: Node vS

• set vi = 0
• Attach vx and compute ix
• Ro = vx /ix

S

• m
• x

S S x

R r g r v R v i ) 1 ( + + = =

S

• m
• x

x

• R

r g r v i R ) 1 ( 1 1 + + = ≡

Common Gate Configuration

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• m

vo L

• m

v L

• m

i

• v

r g A R r g A R r r r g v v A ≈ ′ ≈ ′ + = = ) || ( ) || ( 1

i

• m

L

• i

m

• i
• L
• i

gs

v r r g R r v v g r v v R v v v + = ′ = − + − + ′ − = 1 || ) ( Node voltage method: Node vo

Gain

Common Gate Configuration (Ri and Ro)

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• m

L m i

• m

L

• i

i i

r g R g R r g R r i v R ′ + ≈ + ′ + = = 1 1 ) ( ) 1 ( ) (

L

• i
• m

i L i

• gs

m i i

R r i r g v R i r v g i v ′ + = + ′ + + = KVL:

• r

R =

Current source becomes open circuit

Output Resistance (set vi = 0) Input Resistance

Common Drain Configuration (Source Follower)

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1 1 ) || ( 1 ) || ( ≈ + = ′ + ′ =

• m
• m

vo L

• m

L

• m

v

r g r g A R r g R r g A

• m

L

• i

m

• i

m

• L
• i

gs

v g R r v v g v v g r v R v v v v + ′ = = − − + ′ − = || ) ( Node voltage method: Node vo

Gain

Common Drain Configuration (Source Follower)

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m x

• x

gs m

• x

x

g v r v v g r v i / 1 + = − =

Input Resistance Output Resistance (set vi = 0)

1 || 1

m

• m
• g

r g R ≈ = =

i

i ∞ = =

i i i

i v R

MOS Basic Amplifier Configurations

(PMOS circuits are identical)

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Common Source with RS

• L

S m L m v

r R R g R g A / 1 ′ + + ′ − =

Common Drain/Source Follower

) || ( 1 ) || (

L

• m

L

• m

v

R r g R r g A ′ + ′ =

Common Source

) || (

L

• m

v

R r g A ′ − =

Common Gate

) || (

L

• m

v

R r g A ′ =

MOS Elementary R forms

A Transistor can be configured to act as a resistor for small signals!

• F. Najmabadi, ECE65, Winter 2012
• r

R =

Set vi = 0, current source becomes open circuit

Ex: Output resistance of a CS Amplifier

• r
• If we connect any two terminals of a MOS, we get a two-terminal device.
• For Small Signals, this two terminal device can be replaced with its

Thevenin equivalent circuit.

• As there is NO independent sources present, the Thevenin

equivalent circuit is reduced to a resistor.

Notation: ro is the small-signal resistance between the point and ground

Transistor can be configured to act as a resistor for small signals!

• F. Najmabadi, ECE65, Winter 2012
• But, MOS should be in saturation for small signal model to work!
• Connection between MOS terminals are, therefore, made through

ground for small signals.

• In fact, one or both MOS terminals have to be connected to bias power

supplies to ensure that MOS is in saturation Small Signal Circuit Real Circuit

A)

No Small Signal circuit MOS is NOT in saturation

B)

MOS Elementary R forms (PMOS circuits are identical)

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∞ Input resistance

• f CS Amp

Output resistance

• f CS Amp with Rs

) 1 ( ) 1 ( R g r R R g r

m

• m
• +

≈ + + Input resistance

• f CG Amp
• m
• r

g R r + + 1 Diode-connected Transistor Always in saturation!

m

• m

g r g 1 || 1 ≈ Above configurations are for Small Signal. Typically one or both “signal” grounds are actually connected to bias voltage sources to ensure that MOS is in saturation!

• r

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Basic BJT Amplifier Configurations

We are considering only signal circuit here!

Possible BJT amplifier configurations

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Same as Common Base (vi does not change) Common-Emitter Common-Base Common-Collector Common-Emitter with RE Not Useful

Common Emitter Configuration (Gain)

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Signal Circuit: Signal Circuit with MOS SSM:

• m

vo L

• m

i

• v

L

• m
• r

g A R r g v v A R r v g v − = ′ − = = ′ − = ) || ( ) || (

π

By KCL

Common Emitter Configuration (Ri)

• F. Najmabadi, ECE65, Winter 2012

π π

r i v R r v i

i i i i i

= = =

Signal Circuit with MOS SSM: Relevant circuit for Ri calculation

Common Emitter Configuration (Ro)

• F. Najmabadi, ECE65, Winter 2012
• r

R =

Current source becomes open circuit

Signal Circuit with MOS SSM: Relevant circuit for Ro calculation (set vi = 0)

BJT Basic Amplifier Configurations

(PNP circuits are identical)

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Common Emitter with RE Common Collector/ Emitter Follower

) || ( 1 ) || (

L

• m

L

• m

v

R r g R r g A ′ + ′ =

Common Emitter

) || (

L

• m

v

R r g A ′ − =

Common Base

) || (

L

• m

v

R r g A ′ =

) / 1 )( / ( 1

π

r R r R R g R g A

E

• L

E m L m v

+ ′ + + ′ − =

BJT Elementary R forms (PNP circuits are identical)

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• m
• r

g R r + + ≈ 1

• r

) 1 ( R g r

m

• +

≈ β

π

R r + ≈ R r ) 1 ( β

π

+ +

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Discrete Amplifier Configurations

We focus on biasing with Emitter/Source degeneration!

Emitter-degeneration bias circuits

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Bias with one power supply (voltage divider)

E E BE B B BB

R I V R I V + + =

Bias with two power supplies

E E BE B B EE

R I V R I V + + =

Emitter-degeneration bias circuits have similar signal circuits

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Bias with one power supply (voltage divider) Bias with two power supplies The same circuit for

2 1 || B B B

R R R =

Signal Circuits

By-pass capacitors

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Basic CE Configuration

• There is no RE in the basic Common-Emitter

configuration.

• However, RE is necessary for bias in discrete circuits.
• Use a by-pass capacitor

Real Circuit Bias Circuit: Cap is open, RE stabilizes bias Signal Circuit: Capacitor shorts RE

Discrete Common-Emitter Amplifier

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Standard Bias Circuit:* Caps are open circuit Real Circuit CE amplifier: Input at the base Output at the collector

* Bias calculations are NOT done here as we have done them before.

Signal circuit of the discrete CE Amplifier

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Real Circuit Short caps Zero bias supplies Rearrange

Discrete CE Amplifier (Gain)

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i

• sig

i i sig

• L

C

• m

i

• v

v R R R v v R R r g v v × + = − = ) || || (

Basic CE configuration  Signal input at the base  Signal output at the collector  No RE

L C L

R R R || = ′

Discrete CE Amplifier (Ri)

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 Replace transistor with its equivalent resistance

Elementary R form

||

π

r R R

B i = π

r R =

π

r R =

Discrete CE Amplifier (Ro)

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 Set vsig = 0  Replace transistor with its equivalent resistance

Elementary R form

||

• C
• r

R R =

• r

R =

Discrete CE and CS Amplifiers

• F. Najmabadi, ECE65, Winter 2012

|| ) || || (

• D
• G

i L D

• m

i

• r

R R R R R R r g v v = = − =

i

• sig

i i sig

• v

v R R R v v × + = || || ) || || (

• C
• B

i L C

• m

i

• r

R R r R R R R r g v v = = − =

π

Discrete CS Amplifier with RS

• F. Najmabadi, ECE65, Winter 2012

Real Circuit

Signal Circuit

Short caps Zero bias supplies CS amplifier with RS Input at the gate Output at the drain

Bias Circuit

Caps open

Discrete CS Amplifier with RS (Gain)

• F. Najmabadi, ECE65, Winter 2012

i

• sig

i i sig

• L

D S m L D m i

• v

v R R R v v r R R R g R R g v v × + = + + − = / ) || ( 1 ) || (

Basic CS configuration with RS

L D L

R R R || = ′  Signal input at the gate  Signal output at the drain  RS !

Discrete CS Amplifier with RS (Ri)

• F. Najmabadi, ECE65, Winter 2012

G i

R R =

 Replace transistor with its equivalent resistance

Elementary R form ∞ = R

Discrete CS Amplifier with RS (Ro)

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[ ]

) 1 ( ||

S S m

• D
• R

R g r R R + + =

 Set vsig = 0  Replace transistor with its equivalent resistance  Since ig = 0, Rsig and RG can be removed (vg = 0)

Elementary R Configuration

S S m

• R

R g r R + + = ) 1 (

S

R

S S m

• R

R g r R + + = ) 1 (

Discrete CE and CS Amplifiers with RE / RS

• F. Najmabadi, ECE65, Winter 2012

[ ]

) 1 ( || / ) || ( 1 ) || (

S S m

• D
• G

i

• L

D S m L D m i

• R

R g r R R R R r R R R g R R g v v + + = = + + − =

i

• sig

i i sig

• v

v R R R v v × + =

[ ]

                + + + ≈ + + ≈ + − ≈ + + + − =

sig B E E

• C
• E

B i E m L D m i

• E
• L

D E m L D m i

• R

R R r R r R R R r R R R g R R g v v r R r R R R g R R g v v || 1 || ) 1 ( || 1 ) || ( ) / 1 ]( / ) || [( 1 ) || (

π π π

β β

Discrete CB Amplifier

• F. Najmabadi, ECE65, Winter 2012

Real Circuit

Signal Circuit

Short caps Zero bias supplies CS amplifier with RS Input at the gate Output at the drain

Bias Circuit

Caps open Capacitor CB is necessary. Otherwise, Amp gain drops substantially.

Discrete CB Amplifier (Gain)

Basic CB form

L C L

R R R || = ′  Signal input at the source  Signal output at the drain

i

• sig

i i sig

• L

C

• m

i

• v

v R R R v v R R r g v v × + = + = ) || || (

• m

L C

• r

g R R r R + + = 1 ) || (

Discrete CB Amplifier (Ri)

1 ) || ( ||       + + =

• m

L C

• E

i

r g R R r R R

 Replace transistor with its equivalent resistance

Elementary R Configuration

L C

R R ||

Discrete CB Amplifier (Ro)

{ }

)] || ( 1 [ ||

sig E m

• C
• R

R g r R R + =

 Set vsig = 0  Replace transistor with its equivalent resistance

Elementary R Configuration )] || ( 1 [

sig E m

• R

R g r R + ≈

Discrete CB and CG Amplifiers

• F. Najmabadi, ECE65, Winter 2012

i

• sig

i i sig

• v

v R R R v v × + =

{ }

)] || ( 1 [ || 1 ) || ( || ) || || (

sig E m

• C
• m

L C

• E

i L C

• m

i

• R

R g r R R r g R R r R R R R r g v v + =       + + = + =

{ }

)] || ( 1 [ || 1 ) || ( || ) || || (

sig S m

• D
• m

L D

• S

i L D

• m

i

• R

R g r R R r g R R r R R R R r g v v + =       + + = + =

Discrete CD Amplifier (Source Follower)

• F. Najmabadi, ECE65, Winter 2012

Real Circuit

Signal Circuit

Short caps Zero bias supplies CS amplifier with RS Input at the gate Output at the drain

Bias Circuit

Caps open

Discrete CD Amplifier (Gain)

• F. Najmabadi, ECE65, Winter 2012

Basic CD form  Signal input at the gate  Signal output at the source

i

• sig

i i sig

• L

S

• m

L S

• m

i

• v

v R R R v v R R r g R R r g v v × + = + = ) || || ( 1 ) || || (

L S L

R R R || = ′

Discrete CD Amplifier (Ri)

• F. Najmabadi, ECE65, Winter 2012

 Replace transistor with its equivalent resistance

Elementary R Configuration ∞

G i

R R =

Discrete CD Amplifier (Ro)

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1 ||

m S

• g

R R =

R Elementary R Configuration

 Set vsig = 0  Replace transistor with its equivalent resistance  Since ig = 0, Rsig and RG can be removed (vg = 0)

R

m

• m

g r g 1 || 1 ≈

Discrete CC and CD Amplifiers

• F. Najmabadi, ECE65, Winter 2012

1 || ) || || ( 1 ) || || (

m S

• G

i L S

• m

L S

• m

i

• g

R R R R R R r g R R r g v v = = + =

i

• sig

i i sig

• v

v R R R v v × + =

[ ]

β β

π π sig B

• L

E

• B

i L E

• m

L E

• m

i

• R

R r R R R r r R R R R r g R R r g v v || ) || || )( 1 ( || ) || || ( 1 ) || || ( + ≈ + + = + =

Impact of Coupling and Bypass Capacitors (1)

• F. Najmabadi, ECE65, Winter 2012

1 1 1 1

) ( 1 / 1 1 ) /( 1

c sig i p p sig i i sig i c sig i i sig i

C R R j R R R v v C j R R R v v + = − × + = + + = ω ω ω ω High Pass filter with pole at ωp1 ω ω / 1 1

1 p i

• sig

i i sig

• j

v v R R R v v − × × + =

Impact of Coupling and Bypass Capacitors (2)

• F. Najmabadi, ECE65, Winter 2012

Each capacitor introduces a pole!

Poles can be found by inspection: 1) Set vsig = 0 2) Consider each capacitor separately (i.e., assume all others are short). 3) Find R, the total resistance seen between capacitor terminals 4) Pole is given by

1

2 1

c p

C R f π = The lower cut-off frequency of amplifiers can be found from ...

2 1

+ + ≈

p p p

f f f