[PPT] - 8. Biasing Transistor Amplifiers Lecture notes: Sec. 5 Sedra & PowerPoint Presentation

SLIDE 1

8. Biasing Transistor Amplifiers

Lecture notes: Sec. 5 Sedra & Smith (6th Ed): Sec. 5.4, 5.6 & 6.3-6.4 Sedra & Smith (5th Ed): Sec. 4.4, 4.6 & 5.3-5.4

ECE 65, Winter2013, F. Najmabadi

SLIDE 2

Issues in developing a transistor amplifier:

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (2/29)
1. Find the iv characteristics of the elements for the signal (which

can be different than their characteristics equation for bias).

This will lead to different circuit configurations for bias versus signal
2. Compute circuit response to the signal
Focus on fundamental transistor amplifier configurations
3. How to establish a Bias point (bias is the state of the system

when there is no signal).

Stable and robust bias point should be resilient to variations in

µnCox (W/L),Vt (or β for BJT) due to temperature and/or manufacturing variability.

Bias point details impact small signal response (e.g., gain of the

amplifier).

SLIDE 3

BJT biasing with Base Voltage (Fixed Bias)

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (3/29)

B D BB B BE B B BB

R V V I V R I V : KVL BE − = + = −

* Typically VBB = VCC in order to reduce the need for additional reference voltages.

) ( : KVL CE

D BB B C CC CE CE C C CC

V V R R V V V R I V − − = + = − β

B D BB B C

R V V I I − = = β β

SLIDE 4

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (4/29)

Exercise 1: Find RC and RB such that BJT would be in active with VCE = 5V and IC = 25 mA. (VCC = 15 V, Si BJT with β = 100 and VA = ∞).

Ω = + × = + = −

−

400 5 10 25 5 1 : KVL CE

3 C C CE C C

R R V R I

V 7 . 5 and since Active in is BJT

0 =

≥ = >

D CE C

V V I

mA 25 . / = = β

C B

I I k 2 . 57 7 . 10 25 . 5 1 : KVL BE

3

= + × = + = −

− B B BE B B

R R V R I

SLIDE 5

Exercise 2: Consider the circuit designed in Exercise 1 (RC = 400 , RB = 57.2 k, VCC = 15 V ). Find the operating point of BJT if β = 200.

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (5/29)

mA 25 . 7 . 10 2 . 57 5 1 : KVL BE

3

= + × = + = −

B B BE B B

I I V R I V 7 . and V, 7 . : Active in is BJT Assume ≥ > =

CE C BE

V I V V 5 400 10 50 5 1 : KVL CE

3

− = + × × = + = −

− CE CE CE C C

V V V R I mA 50 = =

B C

I I β BJT in saturation! Note, compared to Exercise 1:

IB is the same.
IC has increased.
VCE had decreased.

SLIDE 6

Why biasing with base voltage (fixed bias) does not work?

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (6/29)
Changes in BJT β changes the bias point drastically.
BJT can end up in saturation or in cut-off easily.
In fixed bias, IB is set through
BJT β then sets IC = β IB (IC changes with β ).
CE circuit then sets VCE .
But, requirements for BJT in active are on IC and VCE and NOT on IB
IC > 0 , VCE > VD0
To make bias point independent of changes in β, the bias circuit

should “set” IC and NOT IB !

B D BB B

R V V I − =

SLIDE 7

Biasing with Emitter Degeneration

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (7/29)

      + + = − + + = −

E B E D BB E E BE B B BB

R R I V V R I V R I V 1 : KVL BE β

Requires a resistor in the emitter circuit!

E B

R R ) 1 ( : If + << β

E D BB E C E E D BB

R V V I I R I V V − ≈ ≈ ≈ −

Condition of means that the voltage drop across RB is small and the bias voltage VBB – VD0 appears across RE , setting IE and IC ≈ IE .

E B

R R ) 1 ( + << β

Independent of β !

Note that resistor RB is NOT necessary for good biasing but it may exist due to other considerations.

SLIDE 8

Emitter resistor provides negative feedback!

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (8/29)

T BE V

V B E E BE B B BB

e I R I V R I V

/

∝ + + =

Independent of β !

Negative Feedback:

If IC ≈ IE ↑ (because β ↑) , VBE ↓ IB ↓ IC ≈ IE ↓
If IC ≈ IE ↓ (because β ↓) , VBE ↑ IB ↑ IC ≈ IE ↑

β BE -KVL BE junction BE -KVL BE junction β

SLIDE 9

Requirements for Biasing with Emitter Degeneration

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (9/29)
Requires a resistor in the emitter circuit.
The bias voltage VBB – VD0 should appear across

RE to set IE ≈ IC : 1.

We need to set to ensure

that this condition is always satisfied!

2. VBE ≈ VD0 . In reality, VBE = VD0 ± ∆VBE with

∆VBE ≈ 0.1 V

We need to set or

E E B B BE BB

R I R I V V + = −

E B E E B B

R R R I R I ) 1 ( + << ⇒ << β ) 1 (

min E B

R R + << β V 1 ≥

E ER

I V 0.1 >>

E ER

I

SLIDE 10

Emitter Degeneration Bias with a voltage divider

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (10/29)

CC BB B

V R R R V R R R × + = =

2 1 2 2 1

||

Real Circuit Voltage Divider

SLIDE 11

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (11/29)

Exercise 3: Find the bias point of the BJT (Si BJT with β = 200 and VA = ∞).

mA 84 . 2 510 7 . ) 1 /( 10 03 . 5 2.22 2.22 : KVL BE

3

= + + + × = + + = −

E E E E E BE B B

I I I R I V R I β

V 7 . and V, 7 . : Active in is BJT Assume ≥ > =

CE C BE

V I V

V 0.7 V 10.7 510 10 84 . 2 10 10 82 . 2 15 5 1 : KVL CE

3 3 3

= > = × × + + × × = + + = −

− − D CE CE E E CE C C

V V V R I V R I V 22 . 2 15 k 34 k 9 . 5 k 9 . 5 k 03 . 5 k 34 || k 9 . 5 ||

2 1 2 2 1

= × + = × + = = = =

CC BB B

V R R R V R R R A 14.1 ) 1 /( mA 82 . 2 ) 1 /( µ β β β = + = = + × =

E B E C

I I I I

Notes:

1. We need to solve the complete BE-KVL

as we do not know if

2. β >> 1 is a good approximation that

reduces the amount of work. Answers using β >> 1 approximation:

) 1 (

E B

R R + << β V 10.7 A 14.2 mA, 2.84 = = ≈ ≈

CE B E C

V I I I µ

SLIDE 12

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (12/29)

Step 1: Find RC and RE

k 2.0 k 3.0 k 1.0 : Choose = − = =

E C E

R R R

Exercise 4: Design a BJT bias circuit (emitter degeneration with voltage divider) such that IC = 2.5 mA and VCE = 7.5 V. (VCC = 15 V Si BJT with β ranging from 50 to 200 and VA = ∞).

k 3.0 5 . 7 ) ( 10 5 . 2 15 5 1 : KVL CE

3

= + + + × × = + + = −

− E C E C E E CE C C

R R R R R I V R I

Free to choose individual values RE & RC (we will see later that amplifier parameters sets the individual values) Circuit Prototype Check:

V 1 ≥

E ER

I V 1 5 . 2 10 10 5 . 2

3 3

≥ = × × =

− E ER

I

SLIDE 13

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (13/29)

Step 2: Find RB and VBB Using relative error, ε = 10% Use largest RB (Will see later why)

Exercise 4 (Cont’d): Design a BJT bias circuit (emitter degeneration with voltage divider) such that IC = 25 mA and VCE = 5 V. (VCC = 15 V Si BJT with β ranging from 50 to 200 and VA = ∞).

k 5.1 k 5.1 ) 1 ( 0.1 ) 1 (

min min

= → = + ≤ → + <<

B E B E B

R R R R R β β V 20 . 3 10 10 2.5 0.7

3 3

= → × × + = + ≈ + + =

BB

E

C D BB E E BE B B BB

V R I V V R I V R I V

Step 3: Find R1 and R2

213 . 15 3.20 k 10 . 5 ||

2 1 2 2 1 2 1 2 1

= = + = = + = = R R R V V R R R R R R R

CC BB B

k 6.4 k 23.9 213 . k 10 . 5

2 1

= = = R R

Step 4: Find commercial R values: RC = 2 k RE = 1 k R1 = 24 k R2 = 6.4 k

SLIDE 14

Emitter-degeneration bias circuits

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (14/29)

Basic Arrangement

E E BE B B BB

R I V R I V + + =

Bias with one power supply (voltage divider)

E E BE B B BB

R I V R I V + + =

Bias with two power supplies

E E BE B B EE

R I V R I V + + =

EE E E BE B B

V R I V R I − + + =

SLIDE 15

MOS bias with Gate Voltage (Fixed Bias)

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (15/29)
This method is NOT desirable as µnCox (W/L) and Vt are not “well-

defined.” Bias point (i.e., ID and VDS) can change drastically due to temperature and/or manufacturing variability.

See S&S Exercise 5.33 (S&S 5th Ed: Exercise 4.19): Changing Vt from 1 to

1.5 V leads to a 75% change in ID.

D D DD DS t GS

x

n D

R I V V V V L W C I − = − =

2

) ( 5 . 0 µ

SLIDE 16

MOS bias with Source Degeneration (Resistor RS provides negative feedback!)

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (16/29)

Negative Feedback:

If ID ↑ (because µnCox (W/L) ↑ or Vt ↓ ) VGS ↓ ID ↓
If ID ↓ (because µnCox (W/L) ↓ or Vt ↑ ) VGS ↑ ID ↑

ID Eq. GS KVL GS KVL ID Eq.

Feedback is most effective if

S G D D S G GS GS D S

R V I I R V V V I R / ≈ ⇒ = + − >>

2

) ( 5 .

t GS

x

n D D S G GS

V V L W C I I R V V − = − = µ

SLIDE 17

Source-degeneration bias circuits

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (17/29)

Basic Arrangement

S D GS G

R I V V + =

Bias with one power supply (voltage divider) Bias with two power supplies

SS S D GS

V R I V − + =

S D GS G

R I V V + =

S D GS SS

R I V V + =

SLIDE 18

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (18/29)

Exercise 5: Find the bias point for Vt = 1 V and µnCox (W/L) = 1.0 mA/V2 (Ignore channel-width modulation).

Voltage divider (IG = 0)

V 7 15 ) 8 7 /( ) 7 ( = × + =

G

V V 1 6 5 7 ) 10 5 . ( 10 1 7 7 : KVL

GS

5 .

2 2 3 4 2

= → = − + = × × + + = + + + = = =

− OV OV OV OV OV D S t OV D S GS G OV

x

n D

V V V V V I R V V I R V V V L W C I µ V 5 V 10 15 15 : KVL

DS

= − = = − = + =

S D DS D D D D D D

V V V I R V V I R mA 5 . / V 5 2 7 V 2 1 = = = − = − = = + =

S S D GS G S OV GS

R V I V V V V V

Exercise (impact of RS): Prove that if Vt = 1.5 V (50% change), ID = 0.455mA (9% change)

SLIDE 19

Biasing in ICs

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (19/29)
Resistors take too much space on the chip. So, biasing with emitter
r source degeneration are NOT implemented in ICs.
Recall that the goal of a good bias is to ensure that IC and VCE (or

ID and VDS for MOS) do not change. One can force IC (or ID for MOS) to be constant using a current source.

Current source forces IE = I Current source forces ID = I

SLIDE 20

BJT response to a current source

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (20/29)

1) Current source forces:

I I I

E C

= ≈

3B) VE is set by BE-KVL

E BE B B

V V I R + + =

2) IB = IC / β 3A)

C C CC C

I R V V − =

4)

E C CE

V V V − =

SLIDE 21

MOS response to a current source

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (21/29)

1) Current source forces:

I ID =

3B)

GS GS G S

V V V V − = − =

2) VGS is set by

2

) ( 5 .

t GS

x

n D

V V L W C I − = µ

3A)

D D DD D

I R V V − =

4)

S D DS

V V V − =

SLIDE 22

Current Mirrors (or Current Steering circuits) are used as current sources for biasing ICs

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (22/29)

Identical BJTs

Qref is always in active since
Identical BJTs and vBE,ref = vBE1
BJTs will have the same iB and the

same iC (ignoring Early effect)

, , , D ref BE ref CE ref C

V V V i = = > β

C C B ref C ref

i i i i I 2 2 : KCL

,

+ = + = / 2 1 1

ref ref C

I I i I ≈ + = = β

For the current mirror to work, Q1

should be in active:

1 1 D EE C CE

V V V V ≥ + =

Since I1 = const. regardless of

VC1 , this is a current source!

SLIDE 23

An implementation of a BJT Current Mirror

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (23/29)

R V V V I I V V I R V

D EE CC ref EE BE ref CC ref 1

: ) Q ( KVL

BE

− + = ≈ − + =

SLIDE 24

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (24/29)

Exercise 6: Find the bias point of Q2 (Si BJT with β = 100 and VA = ∞).

mA 4.65 mA 4.65 5 10 2 5

1 3

= ≈ = − + × =

ref ref BE ref

I I I V I

Current Mirror

V 1.165 7 . 10 5 . 46 10 10 10 10 : KVL

BE2

2 1 2 6 3 2 2 2 3

− = = + + × × × = + + × =

− E C E E BE B

V V V V V I A 46.5 / mA 4.65

2 2 1 2 2

µ β ≈ = ≈ = ≈

C B E C

I I I I I V 7 . 1.56 V 1.56 165 . 1 10 65 . 4 10 5 10 5 : KVL

CE2

2 2 3 3 2 2 2 2 3

= > = = − × × − = + + =

− D CE CE CE E CE C

V V V V V V I

Assume Q2 in active: Q2 in active! Check Q1 in active:

V 7 . 3.835 V 3.835 5 1.165 ) 5 (

1 1 1

= > = = + − = − − =

D CE C CE

V V V V

SLIDE 25

Examples of BJT current mirrors

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (25/29)

PNP current Mirror

One “reference” BJT feeds many current mirrors
Integer multiple of Iref can be made (See Q3 & Q4)

SLIDE 26

MOS Current-Steering Circuit

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (26/29)
Qref is always in saturation since
OV

OV ref OV GS GS ref GS t ref GS ref GS ref DS

V V V V V V V V V V = = = = − > =

1 , 1 , , , , 2 1 1 1 2 ,

) / ( 5 . ) / ( 5 .

OV

x

n D OV ref

x

n ref D ref

V L W C i I V L W C i I µ µ = = = =

( ) ( )ref

ref

L W L W I I / /

1 1 =

For the current steering circuit to

work, Q1 should be in saturation:

t GS OV DS

V V V V − = >

1

Identical MOS: Same µCox and Vt

Since I1 = const. regardless of

VD1 , this is a current source!

SLIDE 27

An implementation of a MOS current steering circuit

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (27/29)

The above quadratic equation gives VOV . I1 is then found from the MOS iD equation.

SS GS D DD ref OV ref

x

n D ref

V v Ri V V L W C i I − + = = = : ) Q ( KVL

GS

) / ( 5 .

2

µ ] [ ] ) / ( 5 . [

2

= + − − + + = + − − +

t DD SS OV OV ref

x

n t DD SS OV D

V V V V V R L W C V V V V Ri µ

SLIDE 28

Examples of MOS current steering circuits

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (28/29)
One “reference” MOS feeds many current steering

circuits.

Any value of Iref can be made (thus, current-

steering circuit instead of current-mirror)

( ) ( )ref

ref

L W L W I I / /

1 1 =

( ) ( )ref

ref

L W L W I I / /

2 2 =

PMOS current steering circuit

SLIDE 29

An implementation of current steering circuit to bias several transistors in an IC

F. Najmabadi, ECE65, Winter 2013, Amplifier Biasing (29/29)