6. Introduction to Transistor Amplifiers: Concepts and Small-Signal - - PowerPoint PPT Presentation

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6. Introduction to Transistor Amplifiers: Concepts and Small-Signal - - PowerPoint PPT Presentation

6. Introduction to Transistor Amplifiers: Concepts and Small-Signal Model Lecture notes: Sec. 5 Sedra & Smith (6 th Ed): Sec. 5.4, 5.6 & 6.3-6.4 Sedra & Smith (5 th Ed): Sec. 4.4, 4.6 & 5.3-5.4 ECE 65, Winter2013, F. Najmabadi


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SLIDE 1
  • 6. Introduction to Transistor Amplifiers:

Concepts and Small-Signal Model

Lecture notes: Sec. 5 Sedra & Smith (6th Ed): Sec. 5.4, 5.6 & 6.3-6.4 Sedra & Smith (5th Ed): Sec. 4.4, 4.6 & 5.3-5.4

ECE 65, Winter2013, F. Najmabadi

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SLIDE 2

Foundation of Transistor Amplifiers (1)

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (2/32)
  • MOS transfer function is NOT linear
  • In saturation, however, transfer

function looks linear (but shifted)

  • A voltage amplifier requires

vo/vi = const. (2 examples below)

  • vo/vi can be negative (minus sign

represents a 180o phase shift)

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SLIDE 3

Foundation of Transistor Amplifiers (2)

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (3/32)
  • In saturation, transfer function appear to be linear

Approximate the transfer function with a tangent line at point Q (with a slope of − A): vDS − VDS = − A (vGS − VGS ) vds = − A vgs (linear relationship) for vds = vDS − VDS and vgs = vGS − VGS

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SLIDE 4

Foundation of Transistor Amplifiers (3)

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (4/32)
  • Let us consider the response if NMOS remains in saturation at all times

and vGS is a combination of a constant value (VGS) and a signal (vgs):

gs GS GS

v V v + =

slide-5
SLIDE 5

The response to a combination of vGS = VGS + vgs can be found from the transfer function

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (5/32)
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SLIDE 6

Response to the signal appears to be linear

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (6/32)
  • Response (vo = vDS ) is also made of

a constant part (VDS ) and a signal response part (vds).

  • Constant part of the response, VDS ,

is ONLY related to VGS , the constant part of the input (Q point on the transfer function of previous slide).

  • i.e., if vgs = 0, then vds = 0
  • The shape of the time varying portion
  • f the response (vds) is similar to vgs.
  • i.e., vds is proportional to the input

signal, vgs

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SLIDE 7

Although the overall response is non-linear, the transfer function for the signal is linear!

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (7/32)

vgs vds vGS = VGS + vgs vDS = VDS + vds iD = ID + id Signal and response Constant: Bias Non-linear relationship among these parameters Approximately Linear relationship among these parameters

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SLIDE 8

Important Points and Definitions!

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (8/32)
  • Signal: We want the response of the circuit to this input.
  • Bias: State of the system when there is no signal.
  • Bias is constant in time (may vary extremely slowly compared to signal)
  • Purpose of the bias is to ensure that MOS is in saturation at all times.
  • Response of the circuit (and its elements) to the signal is different

than its response to the Bias (or to Bias + signal):

  • Signal iv characteristics of elements are different, i.e. relationships

among vgs , vds , id is different from relationships among vGS , vDS , iD .

  • Signal transfer function of the circuit is different from the transfer

function for total input (Bias + signal). Above observations & conclusions equally apply to a BJT in the active mode!

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SLIDE 9

Issues in developing a transistor amplifier:

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (9/32)
  • 1. Find the iv characteristics of the elements for the signal (which

can be different than their characteristics equation for bias).

  • This will lead to different circuit configurations for bias versus signal
  • 2. Compute circuit response to the signal
  • Focus on fundamental transistor amplifier configurations
  • 3. How to establish a Bias point (bias is the state of the system

when there is no signal).

  • Stable and robust bias point should be resilient to variations in

µnCox (W/L),Vt (or β for BJT) due to temperature and/or manufacturing variability.

  • Bias point details impact small signal response (e.g., gain of the

amplifier).

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SLIDE 10

Signal Circuit

1) We will find signal iv characteristics of various elements. 2) In order to use circuit theory tools, we will use the signal iv characteristics of various elements to assign a circuit symbol. e.g.,

  • We will see that the diode signal iv characteristics is linear so for

signals, diode can be modeled as a “circuit theory” resistor.

  • In this manner, we will arrive at a signal circuit.
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SLIDE 11

Bias and Signal Circuits

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (11/32)

Bias & Signal

..... : ,...) ( , , , : MOS

r R R r R R D gs GS GS D DS GS

i I i v V v R v V v i v v + = + = + = ..... , : , , , : MOS

R R D D DS GS

I V R I V V ..... , : , , , : MOS

r r D d ds gs

i v R i v v

+

Bias Signal only = (Bias + Signal) - Bias

?

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SLIDE 12

Finding signal circuit elements -- Resistor

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (12/32)

) (

R R R R R R r

I i R RI Ri V v v − = − = − =

Resistor

Voltage Current iv Equation Bias + Signal: vR iR vR = R iR Bias: VR IR VR = R IR Signal: vr = vR − VR ir = iR − IR ??

r r

Ri v =

  • A resistor remains as a resistor in the signal circuit.
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SLIDE 13

Finding signal circuit elements -- Capacitor

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (13/32)

dt V v d C dt dV C dt dv C I i i

C C C C C C c

) ( − = − = − =

Capacitor

Voltage Current iv Equation Bias + Signal: vC iC iC = C dvC /dt Bias: VC IC IC = C dVC /dt Signal: vc = vC − VC ic = iC − IC ??

dt dv C i

c c =

  • A capacitor remains as a capacitor in the signal circuit.
  • Since VC = const., IC = 0 ,

i.e., A capacitor acts as an open circuit for bias circuit.

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SLIDE 14

Finding signal circuit elements – IVS & ICS

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (14/32)

= − = − =

DD DD IVS IVS ivs

V V V v v

Independent voltage source Voltage Current iv Equation Bias + Signal: vIVS iIVS vIVS = VDD = const Bias: VIVS IIVS VIVS = VDD = const Signal: vivs = vIVS − VIVS iivs = iIVS − IIVS ??

, ≠ =

ivs ivs

i v

  • An independent voltage source becomes a short circuit!
  • An independent current source becomes an open circuit!

Similarly:

Exercise: Show that dependent sources remain as dependent sources

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SLIDE 15

Summary of signal circuit elements

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (15/32)
  • Resistors& capacitors: The Same
  • Capacitor act as open circuit in the bias circuit.
  • Independent voltage source (e.g., VDD) : Effectively grounded
  • Independent current source: Effectively open circuit
  • Dependent sources: The Same
  • Non-linear Elements:

Different!

  • Diodes & transistors ?
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SLIDE 16

Diode Signal Response

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (16/32)

      −         ×         =         −         + = − = 1 exp exp exp exp : Signal

T d T D s d T D s T d D s D D d

nV v nV V I i nV V I nV v V I I i i

VD ID vd id ?

        = +

T D s D

nV v I i exp : Signal Bias         =

T D s D

nV V I I exp : Bias

vD iD

  • A different iv equation!
  • iv equation is non-linear!
  • Related to bias value, ID!

1 exp       −         × =

T d D d

nV v I i

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SLIDE 17

Diode small-signal model:

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (17/32)

1 exp       −         × =

T d D d

nV v I i

vd id ?

D T D T d D d T d T d T d T d T d T d

v nV I nV v I i nV v nV v nV v nV v nV v nV v         =       −         + × ≈         + ≈         << +         +         + =         1 1 1 exp : 1 If .... ! 2 1 1 exp : Exapnsion Series Taylor

2 d d d D T d

i r i I nV v = =

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SLIDE 18

Formal derivation of small signal model

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (18/32)

2 ) 2 ( ) 1 (

! 2 ) ( ) (

a A a A

v V f v V f ⋅ >> ⋅

) ( ) ( 2

) 2 ( ) 1 ( A A a

V f V f v ⋅ <<

Small signal means:

a A a a

v V f v g i ⋅ = = ) ( ) (

) 1 (

  • Signal + Bias for element A (iA, vA) :

iA = f (vA)

  • Bias for element A (IA, VA) :

IA = f (VA)

  • Signal for element A (ia, va) :

ia = g (va)

( ) ( )

a A A a A a A A A A A A A A A A A

v V f V f v V f v V f V f V v V f V v V f V f v f i ⋅ + ≈ + ⋅ + ⋅ + = + − ⋅ + − ⋅ + = = ) ( ) ( ... ! 2 ) ( ) ( ) ( ... ! 2 ) ( ) ( ) ( ) (

) 1 ( 2 ) 2 ( ) 1 ( 2 ) 2 ( ) 1 (

(Taylor Series Expansion)

a A A A a A

v V f I I i i ⋅ + = + = ) (

) 1 (

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SLIDE 19

Derivation of diode small signal model

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (19/32)

) ( 1

D nV v S D

v f e I i

T D

=         − ⋅ =

T T

nV v S T nV v S

e I nV v f e I v f 1 ) ( 1 ) (

) 1 (

× =         − = 1 ) (

S nV V S nV V S D D

I e I e I V f I

T D T D

− =         − ⋅ = =

d T S D d T nV V S d V v T nV v S d D d

v nV I I v nV e I v nV e I v V f i

T D D T

×       + = ×           ⋅ = ×           ⋅ = × =

=

) (

) 1 ( d T D d T S D d

v nV I v nV I I i ×       ≈ ×       + =

d d d

r v i =

D T d

I nV r ≈

vd id rd = nVT/ID vD iD

Diode can be replaced with a resistor in the signal circuit!

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SLIDE 20

Small signal model vs iv characteristics

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (20/32)

Small signal model is equivalent to approximating the non-liner iv characteristics curve by a line tangent to the iv curve at the bias point

D T D d d D d

I nV V f r v V f i ≈ = × = ) ( 1 ) (

) 1 ( ) 1 (

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SLIDE 21

Derivation of MOS small signal model (1)

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (21/32)
  • Signal + Bias for MOS (iD, vGS , vDS) :

iD = f (vGS, vDS), iG = 0

  • Bias for MOS (ID, VGS , VDS) :

ID = f (VGS, VDS), IG = 0

  • Signal for MOS (id, vgs , vds) :

id = g (vgs , vds), ig = 0 MOS iv equations: iD = f (vGS, vDS) iG = 0

ds V V DS gs V V GS D DS DS V V DS GS GS V V GS DS GS DS GS D d D

v v f v v f I V v v f V v v f V V f v v f i i I

DS GS DS GS DS GS DS GS

× ∂ ∂ + × ∂ ∂ + ≈ + − ⋅ ∂ ∂ + − ⋅ ∂ ∂ + = = = +

, , , ,

... ) ( ) ( ) , ( ) , (

, , ds V V DS gs V V GS d

v v f v v f i

DS GS DS GS

× ∂ ∂ + × ∂ ∂ ≈ (Taylor Series Expansion in 2 variables)

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SLIDE 22

Derivation of MOS small signal model (2)

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (22/32)

ds V V DS gs V V GS d

v v f v v f i

DS GS DS GS

⋅ ∂ ∂ + ⋅ ∂ ∂ =

, ,

) , ( ) 1 ( ) ( 5 .

2 DS GS DS t GS

  • x

n D

v v f v V v L W C i = + − = λ µ

m OV D t GS DS t GS

  • x

n V V DS t GS

  • x

n V V GS

g V I V V V V V L W C v V v L W C v f

DS GS DS GS

≡ = − + − × = + − × = ∂ ∂ 2 ) ( ) 1 ( ) ( 5 . 2 ) 1 )( ( 5 . 2

2 , ,

λ µ λ µ

  • D

DS D DS DS t GS

  • x

n V V t GS

  • x

n V V DS

r I V I V V V V L W C V v L W C v f

DS GS DS GS

1 ) 1 ( ) 1 ( ) 1 ( ) ( 5 . ) ( 5 .

2 , 2 ,

≡ ≈ + = + + − × = − × = ∂ ∂ λ λ λ λ λ µ λ µ λ = + ⋅ =

g

  • ds

gs m d

i r v v g i

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SLIDE 23

MOS small signal “circuit” model

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (23/32)

and

  • ds

gs m d g

r v v g i i + ⋅ = =

D

  • I

r ⋅ ≈ λ 1

OV D m

V I g ⋅ = 2 1 2 2 >> = =

OV A OV

  • m

V V V r g λ

Statement of KCL Two elements in parallel Input open circuit

slide-24
SLIDE 24

PMOS small signal model is identical to NMOS

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (24/32)

=

  • PMOS small-signal circuit model is identical to NMOS
  • We will use NMOS circuit model for both!
  • For both NMOS and PMOS, while iD ≥ 0 and ID ≥ 0, signal quantities: id,

vgs, and vds , can be negative! PMOS* NMOS Exercise: Derive PMOS small signal model (follow derivation of NMOS small-signal model)

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SLIDE 25

Derivation of BJT small signal model (1)

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (25/32)
  • Signal + Bias for BJT (iB, iC, vBE , vCE) :

iB = f1 (vBE), iC = f2 (vBE, vCE)

  • Bias for BJT (IB, IC, VBE , VCE) :

IB = f1 (VBE), IC = f2 (VBE, VCE)

  • Signal for BJT (ib, ic, vbe , vce) :

ib = g1 (vbe), ic = g2 (vbe, vce) BJT iv equations: iB = f1 (vBE) iC = f2 (vBE, vCE)

        + = =

A CE V v s C V v s B

V v e I i e I i

T BE T BE

1 ) / ( β We need to perform Taylor Series Expansion in 2 variables for both iB and iC.

, 1 be V V BE b

v dv df i

CE BE

× ≈

, 2 , 2 ce V V DCE be V V BE c

v v f v v f i

CE BE CE BE

× ∂ ∂ + × ∂ ∂ ≈

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SLIDE 26

Derivation of BJT small signal model (2)

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (26/32)
  • ce

be m c be b

r v v g i r v i + = =

π

) ( ) / (

1 BE V v s B

v f e I i

T BE

= = β

be be V V BE b

v r v dv df i

CE BE

× = × ≈

π

1

, 1 π

β r V I e I V dv df

T B V V v s T V V BE

BE T BE CE BE

1 ) / ( 1

, 1

≡ = =

T BE

V V s B

e I I ) / ( β =         + =

A CE V v s C

V v e I i

T BE

1

A CE A V V s A CE V V s C

V V V e I V V e I I

T BE T BE

+ × =         + = 1

m T C V A CE V v T s V V BE

g V I V v e V I dv df

CE V BE T BE CE BE

≡ =         + = 1

,

, 2

  • CE

A C V V v A s V V CE

r V V I e V I dv df

CE V BE T BE CE BE

1

,

, 2

≡ + = =

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SLIDE 27

BJT small signal “circuit” model

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (27/32)

C A C CE A

  • I

V I V V r ≈ + =

T C m

V I g =

Statement of KCL Two elements in parallel A resistor, rπ , between B & E

  • ce

be m c be b

r v v g i r v i + = =

π B T

I V r =

π

We follow S&S: vbe is denoted as vπ Similar to NMOS/PMOS, the small circuit model for a PNP BJT is the same as that of a NPN.

slide-28
SLIDE 28

Alternative BJT small signal “circuit” model

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (28/32)

π π π π π

β β β i v r v g r V I I I V I g

m T B B C T C m

= × = = × = = gm Model β ib Model

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SLIDE 29

Summary of transistor small signal models

  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (29/32)

1 2

D

  • OV

D m

I r V I g ⋅ ≈ ⋅ = λ

slide-30
SLIDE 30
  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (30/32)

Example 1: Construct the signal circuit and replace the transistor with its small-signal model (assume capacitors are short for signal).

IVS → 0 R remains Caps short Ground at the bottom Replace MOS with its small signal model

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SLIDE 31
  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (31/32)

Example 2: Construct the signal circuit and replace the transistor with its small-signal model (assume capacitors are short for signal).

Flip PMOS IVS → 0 Caps short Ground at the bottom (100k || 33k = 24.8 k) Replace MOS with its small signal model

slide-32
SLIDE 32
  • F. Najmabadi, ECE65, Winter 2013, Intro to Amps (32/32)

Example 3: Construct the signal circuit and replace the transistor with its small-signal model (assume capacitors are short for signal).

ICS → 0 (This makes ICS an open circuit) IVS → 0 Caps short Replace MOS with its small signal model