Further Experiences Teaching an FPGA-based Embedded Systems Class Stephen A. Edwards Columbia University WESE, Torino, Italy, October 4, 2018
What is an FPGA? A Field Programmble Gate Array: A configurable circuit; not a stored-program computer LUT: 16-element lookup table Source: http://evergreen.loyola.edu/dhhoe/www/HoeResearchFPGA.htm
Why FPGAs? Students can explore hardware/software boundary Easy to put a stored-program computer on an FPGA Easy to add custom peripherals FPGA Single-Board Computer Flexible Cheaper Custom peripherals Stock peripherals Commercially uncommon Mainstream Digital logic design w/o soldering Software-only Demands very wide range of skills More narrow
Basic Class Structure Weeks Hardware Lab 1–2 Software Lab 3–4 Hardware-Software Lab 5–6 Project 7–14 Labs come with skeletons; Lab 3 typical project skeleton
2003–2006: XESS XSB-300E (Xilinx Spartan IIE) CP LD C o nn ector 4 M b RS 2 3 2 F l ash Exp a ns i o n C o nn ector 25 6 K x 1 6 Vi d e o SR A M DA C Vi d e o 8 M x 16 De c o d e r SD R A M Pe r i p h e r a l B u s 30 M S PS AD C Et h e r n e t MA C + P H Y Au di o E x p ansion Co de c C o nne ctor E x pa nsion C o n necto r US B 2 . 0 Conn ector ID E D i s k Bu t t o n s LE D s Co m p a c t F l a s h C o nne ctor
2003–2006: XESS XSB-300E (Xilinx Spartan IIE) Microblaze soft processor CP LD C o nn ector 4 M b RS 2 3 2 F l ash Plenty of peripherals: VGA, video in, audio I/O, Ethernet, Exp a ns i o n C o nn ector 25 6 K x 1 6 Vi d e o SR A M DA C USB, PS/2, SRAM, DRAM, Flash Vi d e o 8 M x 16 De c o d e r Pin limit forced bussed peripherals SD R A M Pe r i p h e r a l B u s 30 M S PS AD C Hard to use more than one Et h e r n e t MA C + P H Y Au di o E x p ansion SRAM usually needed; never Co de c C o nne ctor enough FPGA RAM E x pa nsion C o n necto r US B 2 . 0 Used VHDL Conn ector ID E D i s k Bu t t o n s LE D s Co m p a c t F l a s h C o nne ctor [Edwards, WESE 2005]
XSB Projects Raycasting game Internet video camera Audio FFT Video Effects
2007–2013: Terasic DE2 (Altera Cyclone II)
2007–2013: Terasic DE2 (Altera Cyclone II) Nios II soft processor Similar peripherals to XSB Dedicated pins per peripheral No operating system VGA easy; Ethernet hard; USB impossible Still used VHDL
DE2 Projects Pac-Edwards Digital Picture Frame Encrypted video Real-time ray tracer
2014–2016: Terasic SoCKit (Altera Cyclone V)
2014–2016: Terasic SoCKit (Altera Cyclone V) 2 ARM9 Hard Processor Cores Linux: TCP/IP, USB Students write device drivers Switched to System Verilog Boot, run diskless (PXE server) No external SRAM, video input, 7-segment displays Fragile micro-USB connectors
SoCKit Projects Inverse Kinematics Accel. Pottery Game Auto-parking car Game of Life
Open Questions Next generation of boards: DE10-Standard or DE1-SoC or ? How much “friction” to apply to the students? What should they be given vs. what should they develop themselves? Should students be allowed to specialize? Is it OK that students take the class and merely sharpen their existing hardware or software skills? Is the “dynamic range” of skills I require unrealistic?
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