[PPT] - Analog Integrated Circuits Fundamental Building Blocks Fundamental PowerPoint Presentation

SLIDE 1

Analog Integrated Circuits Fundamental Building Blocks

Faculty of Electronics Telecommunications and Information Technology

Fundamental Building Blocks

Current mirrors

Information Technology

Gabor Csipkes

Bases of Electronics Department

SLIDE 2

Outline

 current source biasing – voltage sources  MOS transistor current mirrors

fundamental current mirror
fundamental current mirror
cascode current mirror
low swing cascode current mirror
unbalanced and symmetrical Wilson current mirrors

 bipolar transistor current mirrors

fundamental current mirror
fundamental current mirror with β compensation
fundamental current mirror with resistive emitter degeneration

Analog Integrated Circuits – Fundamental building blocks – Current mirrors 2

fundamental current mirror with resistive emitter degeneration
cascode current mirror
unbalanced and symmetrical Wilson current mirrors

SLIDE 3

Current mirrors – principles of operation

 integrated current sources with transistors need bias voltages → voltage sources 1

m

g

in

R

ut

R Is this a voltage source?  key parameters to consider:

input resistance → must be as small as possible → current input

Current mirror 1: n

Analog Integrated Circuits – Fundamental building blocks – Current mirrors 3

input resistance → must be as small as possible → current input
output resistance → must be as large as possible → current output
minimum required output voltage
required input voltage
current gain → precision imposed by the application

SLIDE 4

The fundamental MOS current mirror

Small signal model NMOS PMOS

2

ut
ut

DS

ut

V R r I  

1

in in in m

V R I g  

min 2

DSat

V V 

1 in DSat Th

V V V  

 current gain:

  

2 2 2

1

GS Th DS

ut

V V V I n       1

ut

V n   

Analog Integrated Circuits – Fundamental building blocks – Current mirrors 4

 current gain:

     

2 2 2 1 1 1

1

GS Th DS

ut

in GS Th DS

I n I V V V       2 1 2

Th DSat

V n V       

Δβ – geometry mismatch
ΔVTh – threshold voltage mismatch

1

ut

in

n V   

SLIDE 5

The MOS cascode current mirror

NMOS PMOS

1 1

min 4 2 2

DSat

DSat Th

V V V V   

3 3 1 1 in DSat Th DSat Th

V V V V V    

 

3 BS

f V

(!)

 

2 4 4 4 2 4

ut

DS DS m mb DS DS

R r r g g r r    

1 3

1 1

in m m

R g g  

Analog Integrated Circuits – Fundamental building blocks – Current mirrors 5

Small signal model

SLIDE 6

The MOS cascode current mirror

 the VGS voltages of M3 and M4 balance the fundamental mirror M1-M2 → n is accurately defined

1 2 in

ut

DS DS

V V V V   

1 DS

V

2 DS

V

1 2 in

ut

DS DS

Analog Integrated Circuits – Fundamental building blocks – Current mirrors 6

The current gain is very close to unity even when the input-

utput voltage imbalance ΔV is

significant

SLIDE 7

The MOS low swing cascode current mirror

 the cascode current mirror is not optimal in terms of V

min → the gate voltage of M4

must be decreased by VTh

4 G

V 1 2

min

2

DSat

V V 

1 2 DS DS

V V 

3 4

4 G

V

Analog Integrated Circuits – Fundamental building blocks – Current mirrors 7

1 2 DS DS R

V V V  

R

triode region

SLIDE 8

The MOS low swing cascode current mirror

NMOS PMOS

1 R 

min 4 2

DSat

DSat

V V V  

1 1 in DSat Th

V V V  

 

2 4 4 4 2 4

ut

DS DS m mb DS DS

R r r g g r r    

1 in m

R g 

Analog Integrated Circuits – Fundamental building blocks – Current mirrors 8

Small signal model

SLIDE 9

The Wilson current mirror

NMOS PMOS

2 3 m m

g g R  

min 3 2 2

DSat

DSat Th

V V V V   

3 3 2 2 in DSat Th DSat Th

V V V V V    

1 3 1 3 2 m m DS DS

ut

m

g g r r R g 

2 3 1 3 m m in m m

g g R g g  

Small signal model Vin and V

ut create voltage imbalance

between V and V

Analog Integrated Circuits – Fundamental building blocks – Current mirrors 9

model between VDS1 and VDS2 Accuracy issues for the current gain n

SLIDE 10

The balanced Wilson current mirror

NMOS PMOS

2 3 m m

g g R  

min 3 2 2

DSat

DSat Th

V V V V   

3 3 2 2 in DSat Th DSat Th

V V V V V    

1 3 1 3 2 m m DS DS

ut

m

g g r r R g 

2 3 1 3 m m in m m

g g R g g  

Analog Integrated Circuits – Fundamental building blocks – Current mirrors 10

Small signal model

SLIDE 11

The fundamental bipolar current mirror

NPN PNP

1

in m

R g 

min 2

CE

V V 

1 in BE

V V 

2 2 1

1

S CE CE

I V V      

2

ut

CE

R r 

2 1 S

I V n     

Analog Integrated Circuits – Fundamental building blocks – Current mirrors 11

 current gain:

2 2 1 1 1 2 2 1 1 1

1 1 1 1

S CE CE S CE EA S CE CE S CE EA

I V V I V V n I V V I V V                       

2 1

2

S S

I n I     

ΔV – input-output voltage imbalance

2 1

1

S S in EA

I V n I V V          

SLIDE 12

The fundamental current mirror with β compensation

NPN PNP

1

in m

R g 

min 2

CE

V V 

1 3 in BE BE

V V V  

 current gain → β replaced by β (β+1) → n much closer to the ideal value when the

2

ut

CE

R r 

Analog Integrated Circuits – Fundamental building blocks – Current mirrors 12

 current gain → β replaced by β (β+1) → n much closer to the ideal value when the input and the output are balanced in voltage

   

2 1

1 1 2

S S

I n I         

2 1

1

S S in EA

I V n I V V          

SLIDE 13

The degenerated fundamental current mirror

NPN PNP

1 1

1

in m

R R g  

min 2 2

CE
ut

V V I R  

1 1 in BE in

V V I R  

 current gain:

2 2 2 2 2

ut

CE m CE

R r R g r R   

1

R n R 

1 1 2 2 BE in BE

ut

V I R V I R   

Analog Integrated Circuits – Fundamental building blocks – Current mirrors 13

 current gain:

2

R

 remember to adjust the emitter areas of Q1 and Q2 proportionally with the current in each branch !!!  n is still affected by the finite β and by ΔV

2 2 1 1 1 2 S S

I A R n A I R   

1 1 2 2 BE in BE

ut

V I R V I R   

SLIDE 14

The bipolar cascode current mirror

NPN PNP

1 3

1 1

in m m

R g g  

min 4 2

CE

BE

V V V  

1 3 in BE BE

V V V  

4 4 2 4 2 4 2 1

1

m CE CE BE

ut

m BE CE m

g r r r R g r r g         

Analog Integrated Circuits – Fundamental building blocks – Current mirrors 14

 current gain → β influences the accuracy while the fundamental mirror Q1-Q2 is balanced by the cascode transistors Q3-Q4

2 2 2 1

4 2

S S

I n I       

SLIDE 15

The bipolar Wilson current mirror

asymmetrical

 

3 2 3 BE m m in

r g g R g g g r   

min 4 2

CE

BE

V V V  

1 3 in BE BE

V V V  

 current gain → β influences the accuracy while the fundamental mirror Q1-Q2 is balanced by the cascode transistors Q3-Q4 balanced

Analog Integrated Circuits – Fundamental building blocks – Current mirrors 15

2 1 3 3 in m m m BE

R g g g r  

1 1 3 1 3 3 1 1 2 1 3 3

1

CE m m CE CE BE

ut

CE CE m m BE BE

r g g r r r R r r g g r r          

2 2 2 1

2 4 2

S S

I n I         

SLIDE 16

Bibliography

 P.E. Allen, D.R. Holberg, CMOS Analog Circuit Design, Oxford University Press, 2002  B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2002  D. Johns, K. Martin, Analog Integrated Circuit Design, Wiley, 1996  P.R.Gray, P.J.Hurst, S.H.Lewis, R.G, Meyer, Analysis and Design of Analog Integrated Circuits, Wiley,2009  R.J. Baker, CMOS Circuit Design, Layout and Simulation, 3rd edition, IEEE Press, 2010

Analog Integrated Circuits – Fundamental building blocks – Current mirrors 16