a ridiculously brief overview of combinational logic
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A Ridiculously Brief Overview of Combinational Logic Design These - PDF document

5DV008 Computer Architecture Ume University Department of Computing Science Stephen J. Hegner Topic 3aux: Logic Design 11/18/09 1 5DV008 20091118 t:2C sl:1 Hegner UU A Ridiculously Brief Overview of Combinational Logic Design These


  1. 5DV008 Computer Architecture Umeå University Department of Computing Science Stephen J. Hegner Topic 3aux: Logic Design 11/18/09 1 5DV008 20091118 t:2C sl:1 Hegner UU A Ridiculously Brief Overview of Combinational Logic Design � These slides provide a brief overview of combinational logic. � They are limited to the ideas absolutely needed for the course. � For a more detailed presentation consult Appendix C on the CD which comes with the course text. 5DV008 t3:aux sl:2 2009-11-18 Hegner UU Types of Logic Circuits � Combinational logic is used to realize memoryless functions. � Sequential logic is used to realize functions which have an internal state. � These slides focus upon combinational logic. 5DV008 t3:aux sl:3 2009-11-18 Hegner UU

  2. Basic Gates The AND gate The OR gate A B C A B C 0 0 0 0 0 0 0 1 1 0 1 0 1 0 0 1 0 1 1 1 1 1 1 1 The Inverter The Buffer A A B B A B 0 0 1 1 0 0 1 1 0 0 1 1 5DV008 t3:aux sl:4 2009-11-18 Hegner UU Further Gates The NAND gate The NOR gate A B C A B C 0 0 1 0 0 1 0 1 1 0 1 0 1 0 1 1 0 0 1 1 0 1 1 0 The XOR gate A B C 0 0 0 0 1 1 1 0 1 5DV008 t3:aux sl:5 2009-11-18 1 1 0 Hegner UU Compact Representation of Negation � Negation may be represented as a circle on another gate. � The following two circuits are equivalent. A B C 0 0 0 0 1 0 1 0 1 1 1 0 5DV008 t3:aux sl:6 2009-11-18 Hegner UU

  3. The Multiplexer � A multiplexer selects between two (or more) inputs. � S is the select line . � Shown is a two-input multiplexer. 5DV008 t3:aux sl:7 2009-11-18 Hegner UU A One-Bit Half Adder A B S C 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 5DV008 t3:aux sl:8 2009-11-18 Hegner UU A One-Bit Full Adder A B C in S C o u t 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 1 0 0 1 1 0 1 1 0 1 0 1 1 1 1 1 1 5DV008 t3:aux sl:9 2009-11-18 Hegner UU

  4. A Sequential Adder � An n-bit sequential adder may be realized by gluing n one-bit adders together. � This is not the best design because the critical path is proportional to n. 5DV008 t3:aux sl:10 2009-11-18 Hegner UU

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