Update on the Si-Strip Tests Hans-Georg Zaunick HISKP Universitt - - PowerPoint PPT Presentation

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Update on the Si-Strip Tests Hans-Georg Zaunick HISKP Universitt - - PowerPoint PPT Presentation

Dec 27, 2022 520 likes •681 views

1 Update on the Si-Strip Tests Hans-Georg Zaunick HISKP Universitt Bonn PANDA collaboration meeting, GSI, March 3, 2008 HG Zaunick Update on the Si-Strip Tests 2 Si-Strip test station in Dresden PC I 2 C- slow control USB USB Master

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Update on the Si-Strip Tests

Hans-Georg Zaunick

HISKP Universität Bonn

PANDA collaboration meeting, GSI, March 3, 2008

HG Zaunick Update on the Si-Strip Tests

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Si-Strip test station in Dresden

sensor APV L-Board

v1.4

HV

Supply Board

v1.2 Data Power LVDS

Gage ADC card Clock/ Trigger Control (Spartan) signal conversion

PC

slow control I2C Data SE Power Data Trig Clk Clk Trig SE

  • slow control
  • clock/trigger

control

  • DAQ

Clk Trig

I2C- Master (FX2)

LVDS low voltage differential signal SE single ended CMOS

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LVDS LVDS Clk Trig differential receiver LVDS I2C USB PCI USB Teststation

  • APV register
  • set voltage
  • monitor

currents

  • set clock
  • set trigger

parameter

  • send trigger
  • calibration
  • scans
  • spectra
  • histos

RS232

HG Zaunick Update on the Si-Strip Tests

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Sensor-PCB

L-shape for double sided mounting mechanical support for sensor/pitch adaptor/FEs supply/bias voltage distribution

HG Zaunick Update on the Si-Strip Tests

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Low Level Feature Exraction Framework

light weight framework set up for current data structures merged Dresden/Bonn low level hit/cluster processing+reco merged with PANDARoot but may be also used stand alone

SVN Repository Checkout

feel free to use/contribute, please contact me for checkout

HG Zaunick Update on the Si-Strip Tests

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Clustering

comparison of different clustering algorithms resolution dependent on

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cluster sizes

2

incident angle

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algorithm

d p θ

  • L. Ackermann (Dresden)

HG Zaunick Update on the Si-Strip Tests

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Module Parameter MySQL Database

DB containing information about all characterized Modules set up by F . Krüger (Dresden)

HG Zaunick Update on the Si-Strip Tests

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Lab setup in Bonn

Implementation of VME-based R/O high modularity → ease of table top setups

HG Zaunick Update on the Si-Strip Tests

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Feature Extraction and data Sparsification implemented in FPGA first tests running with 10MHz R/O clock fast ADCs with up to 65 MSPS coming soon...

HG Zaunick Update on the Si-Strip Tests

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Fast-ADC Mezzanine Card for VME-FPGA R/O card (custom CB-Module) submission this week R.Schnell (Dresden)

HG Zaunick Update on the Si-Strip Tests

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Tracking Station

goals: resolution studies at Si-Sensors measurement of multiple scattering for various materials/configurations for MVD case

HG Zaunick Update on the Si-Strip Tests

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ELSA beam setup for TPC Testbench

HG Zaunick Update on the Si-Strip Tests

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Conclusion evaluation of fully mounted modules w/ double sided readout has begun set up of DB for characterisations of prototype modules and to get familiar with QA processes modular construction of Si-Strip-Sensor “building blocks”

HG Zaunick Update on the Si-Strip Tests

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Whats next? tracking station to study "real life" track resolution and multiple scattering in compound material samples (for MVD-Mec), will be done by two Diploma Students in Bonn (M.Becker, K.Koop) Integration of Strip-FEE readout into Jülich MVD-R/O-Framework

HG Zaunick Update on the Si-Strip Tests

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Announcement PANDA-FE-DAQ Workshop Bavarian Forest, April 22-24

(Organisers: I. Konorov, W. Kühn) all subdetector groups should introduce their requirements on FE-DAQ interface (bandwidth, format, link types, synchronization etc.) discussion of common issues like global clock, compute nodes etc. Online Detector Data Processing - Algorithms, implementations, hardware requirements informations will be collected and made available online more information can be found at: http://www.e18.physik.tu- muenchen.de/research/panda/FEDAQmeeting09.html

HG Zaunick Update on the Si-Strip Tests