Single-electronics: the story so far For small enough structures - - PDF document

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Single-electronics: the story so far For small enough structures - - PDF document

Single-electronics: the story so far For small enough structures and low enough temperatures, Coulomb charging effects can determine the conducting properties of circuits. Two-terminal double-junction devices can show complicated


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SLIDE 1

1 Single-electronics: the story so far

  • For small enough structures and low enough temperatures,

Coulomb charging effects can determine the conducting properties

  • f circuits.
  • Two-terminal double-junction devices can show complicated

(Coulomb staircase) IV curves.

  • Multiterminal devices can show transistor-like functionality,

with substantial current switching modulated by the positions of individual electrons. Main driver for possible applications:

  • Need Ec = e2/Ceq >> kBT, so want smallest junctions possible.

Sizes of things: for Ec = 50 kBT at 300 K, need Ceq ~ 0.1 aF.

Implementations of single electron devices

Several different ways of making SETs:

  • Shadow-evaporation + oxidation of Al

Most common approach, best suited for large-scale fabrication of arrays.

  • Oxidation of silicon

Compatibility / ease of integration with Si

  • Chemically-aided approaches

Trapped nanoparticles; AFM contacting; molecular devices.

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SLIDE 2

2 Shadow evaporation and oxidation of Al

Takes advantage of ease of growth of thin, high-quality Al2O3 for tunnel barriers. Uses geometry to make smallest possible junctions. Double-layer resist for e-beam lithography leads to overhang. Evaporate at an angle. Then oxidize for controlled length of time. Evaporate straight down - forms first

  • junction. Then oxidize for controlled

length of time. Third evaporation forms second junction.. source island drain

Shadow evaporation and oxidation of Al

  • Lateral size of junction overlap determined by resist

thicknesses (well-controlled) and angles (also well-controlled).

  • By tilting in different directions, can make complicated

structures:

image from PTB, Germany image from KTH, Sweden

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SLIDE 3

3 Shadow evaporation and oxidation of Al

2d Josephson junction array Inverter from two coupled SETs SET on tip of drawn glass fiber

image from Mooij, Delft, Netherlands image from Mooij, Delft, Netherlands image from Bell Labs

Local oxidation

  • Recall tunneling transistor: local electrochemical oxidation

(anodization) used to convert continuous Ti strip into island + insulating tunnel barriers.

  • Painstaking fabrication, but payoff is SET with some room-

temperature functionality.

images from Matsumoto et al., APL 68 34 (1996).

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SLIDE 4

4 Oxidation of Silicon

image from Steve Chou, Princeton

Oxidation of Silicon

Even for an island as small as this, getting room temperature oscillations is a real challenge.

images from Steve Chou, Princeton

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SLIDE 5

5 Nanocrystalline silicon

Tan et al. work with doped nanocrystalline Si deposited by PECVD. Nanocrystalline regions surrounded by amorphous matrix. Oxidize for known amount

  • f time to from barriers.

Gated laterally.

Tan et al., JAP 94, 633-637 (2003)

Nanocrystalline silicon

Tan et al., JAP 94, 633-637 (2003)

Grain size is sufficiently small that some gate modulation of conductance is detectable even at 300 K. Still a far cry from a workable device.

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SLIDE 6

6 Trapped nanoparticles

One approach: use chemical fabrication to make nanoparticles for use as SET islands. Trap particles between lithographically created electrodes. Electrostatic trapping in above – nanoparticle drawn to region of high local electric field as source/drain are biased.

images from Dekker, Delft

Trapped nanoparticles

Alternative:

  • Start with continuous metal

electrodes on top of insulated metallic substrate, to be used as a gate.

  • Dust surface to decorate with

nanoparticles, such as chemically synthesized CdSe nanocrystals.

  • Break into separate source-drain

electrodes by “electromigration”, and sometimes nanocrystal ends up ideally positioned to act as island.

images from Park et al., APL 75, 301 (1999).

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SLIDE 7

7 Nanoparticles on surfaces

  • Can decorate surface with

tethered nanoparticles, in this case Au colloid.

  • Insulating layer = self-

assembled monolayer of thiol- terminated alkane chains.

  • Scanned probe microscope tip

as drain electrode: Coulomb staircase.

images from Andres et al., Science 272, 1323 (1996).

Nanoparticles on surfaces

images from Gurevich et al., APL 76, 384 (2000).

Special tip can incorporate gate, too, for SET action.

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SLIDE 8

8 Clear technological challenges:

  • Reliable fabrication of sub-10 nm structures with little or no variation

for room temperature Coulomb blockade physics.

  • Tuning of “environmental characteristics” such as stray capacitance.
  • Reliable (self-controlling?) tunnel junctions.
  • Control of single electronic offset charges: individual charged defects

can have effects identical to random offset voltages on gates! Incentives:

  • Dense integration.
  • Possible ultralow power operation (reversible?).
  • Ultimate limits of switching technology.

Technology possibilities

Voltage-based logic:

  • Very similar to typical CMOS logic: high voltage = logic

high; low voltage = logic low.

  • Nonmonotonic drain current as function of gate voltage
  • pens up designs not possible with regular MOSFET

devices. Charge-based logic:

  • Since SETs can sense presence/absence of single

electronic charges, use positions of charges to represent data / logic values.

  • Some novel architectures possible, since charge positions

can cause alter voltages capacitively, which can then move charges: e.g. Quantum Cellular Automata.

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SLIDE 9

9 Voltage-based logic:

It is possible, with SETs, to achieve voltage gain. That is, the

  • utput voltage modulation of a circuit can be greater than the

input voltage modulation: input voltage

  • utput

voltage

G

  • ut

V

V V K ∂ ∂ ≡

images from Zimmerli et al., APL 61, 2816 (1992).

Voltage-based logic:

Circuit designers can treat SET-based logic gates like conventional logic gates (keeping current designs) and leave the details up to the hardware folks. Good point: SET characteristics (oscillatory response to VG) mean that one SET can sometimes replace more than one regular MOSFET. p-type n-type CMOS inverter: 2 transistors

  • f opposite types

SET inverter: 1 SET + resistive load.

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SLIDE 10

10 Voltage-based logic:

Problems:

  • Analysis shows that, for acceptable device performance,

either temperatures must be very low, or devices must be extremely small…. C e T kB 2 01 . ~

2

This can be mitigated slightly (~factor of 3) by using arrays of tunnel junctions, but at cost of lower packing density and more challenging fabrication.

  • “Off”-state leakage leads to power consumption problems

comparable to highly-scaled CMOS.

Charge-based logic:

  • Try to use positions of individual charges to represent “1”s

and “0”s.

  • Have switching action depend on charge state of device

(necessary for logic). Potential advantage: does not require substantial current flow for operation. Power consumption could therefore be advantageous. Tricky problem: single charge errors now become very important.

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SLIDE 11

11 Charge-based logic:

One approach analyzed in detail = SET “parametron”. Has series of islands with “middle” islands asymmetrically coupled. Clock signal pushes electrons along chain.

Summary of problems:

  • Temperature range of operation places great restrictions on device

sizes.

  • Such small devices are likely to suffer tremendous variability.
  • Further, (especially in semiconductor devices) quantum level

spacing effects (which superpose on the charging energies and alter the heights of the blockade conductance peaks) are likely to be significant.

  • Background charges are also a serious problem.

Some chance that this may be self-correcting at sufficiently tiny scales, but not at all clear.

  • Characteristic resistances (~ 10 kΩ) mean that for realistic

capacitances these devices are unlikely to operate at high speeds.

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SLIDE 12

12 Prognosis:

Single electron devices are unlikely to be the technology that replaces CMOS at the few nm scale, unless there is a major breakthrough in fabrication, performace, or architectures. SEDs more likely to find applications in niche areas:

  • Nonvolatile memory
  • Electrometry
  • Metrology standards

Next time:

Applications of single electron devices Capacitance standard Electrometers - the scanning SET Thermometry Intro to the rf-SET

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SLIDE 13

1 Applications of single electron devices

Current and capacitance standards Electrometers - the scanning SET Thermometry Intro to the rf-SET

Metrology

We’ve established that, for a variety of reasons, SEDs are unlikely to become mass-fabricated substitutes / replacements for MOSFETs in consumer technology. What are they good for? Niche applications like metrology. Gadgets that are challenging to fabricate and require moderately extreme conditions to operate are common in precision metrology:

  • Atomic clocks (UHV, temperature control)
  • Quantum Hall resistance standard (low T, high B)
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SLIDE 14

2 Current and capacitance standards

Primary standards for electrical units exist for voltage and resistance: Voltage = Josephson effect Superconductor-insulator-superconductor junction. Applied ac current at frequency f produces dc voltage steps of size nhf / 2e. Constant: 483597.9 GHz/V Resistance = integer quantum Hall effect 2d system, high magnetic field. Hall resistance is quantized to fractions of h/ne2. Constant: 25812.807 Ω

Current and capacitance standards

I V f A primary current standard would allow testing the “metrology triangle”: single-electron tunneling I = ef Josephson effect V = nhf / 2e Quantum Hall RH = h / ne2

  • These quantities had better all be consistent with one

another, or there’s new physics somewhere….

  • Effectively would provide another check on the value of

the fine structure constant.

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SLIDE 15

3 Current standard: SET pump

image from Zorin presentation

Current standard: SET pump

image from Esteve

Recall the basic idea here. Cycling voltages around one

  • f the “triple points” in the

diagram at the lower right should transfer a single electron (on average) through the pump, right to

  • left. (Thus a unidirectional

current from left to right….)

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SLIDE 16

4 Current standard: SET pump

image from Zorin presentation, PTB

Actual experimental data on 2- gate pump agrees with this. Current is nonzero only in vicinity of “triple points”. Three junction two island pump errors in experiment: ~ 1%. Error sources:

  • thermal hopping
  • “missed” tunneling events
  • cotunneling

Current standard: SET pump

One approach to dealing with these errors: more junctions! State-of-the-art: NIST seven-junction six-gate pump. Really designed for low frequency work - electron counting rather than current standard. Errors with this set up: ~ 1.5 x 10-8.

M.W. Keller et al., Science 285, 1706 (1999)

Much better, but very challenging….

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SLIDE 17

5 Capacitance standard

Even slow pumping of electrons can be very useful. Capacitance standard:

  • Make a capacitor.
  • Pump a precisely known number of

electrons onto the capacitor (e.g. with the 7-junction pump).

  • Measure the capacitor voltage

precisely.

  • Q = CV gives the capacitance.

M.W. Keller et al., Science 285, 1706 (1999)

Capacitance standard

Here is the measured voltage change after moving 117 440 513 electrons on and off the capacitor repeatedly. The reproducibility is very good, and the NIST team measured their little cryogenic capacitor to be C = 1.872 484 77 pF . Biggest problem: long term stability due to motion of offset charges in Al2O3 tunnel barriers. Can be improved by working with Si SETs instead.

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SLIDE 18

6 Electrometry

Current flow through SET can be modulated between maximum and minimum values by moving a single electron off and on the gate:

        − ⋅ ≈

T k V V C C e G G

B g g eq g

5 . 2 ) ( ) / ( cosh

2 max image from Ferry

One possible generalization: have the island be a moveable probe! As the island capacitively couples to test objects, its polarization charge Qp changes. This shifts the G vs. VG plot at right. From our SET analysis,

g p C

Q V V / ' + ≡

Electrometry

Basic idea: Bias gate voltage to point where G vs. VG is most rapidly varying. Apply a small source-drain voltage to measure G. Then change the charge distribution near the island. Small changes in V0 lead to large changes in measured source-drain current. Sensitivity limits possible: < 10-5 e/Hz1/2

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SLIDE 19

7 Scanning SET electrometer

One adaptation of this is to place the island

  • n a movable tip, and

scan it over a surface. Result: the SET scanning electrometer (SETSE).

Image from Bell Labs

Scanning SET electrometer

Image from Bell Labs

SETSE is easily sensitive enough to see surface charge fluctuations caused by individual dopant atoms in semiconductor. Problems:

  • slow
  • fragile
  • painful to fabricate
  • requires quite low T.
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SLIDE 20

8 Coulomb blockade thermometry

Remember that a single junction (or for that matter, an array

  • f junctions), when voltage biased, leads to an IV curve that

looks like: I V Voffset Vc V dI/dV The theory has been done for what this “zero-bias anomaly” looks like as a function of temperature for a 1d array of tunnel junctions.

Coulomb blockade thermometry

slide from Pekola et al., CNRS, Grenoble

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SLIDE 21

9 Coulomb blockade thermometry

  • Can improve reliability by having parallel 1d arrays.
  • 2d arrays also work, with essentially identical function for ZBA

width (though high temperature corrections are different).

  • Work from 30 K down to < 20 mK, with basically no B

dependence and comparatively low power dissipation!

image from Bergsten et al., Chalmers, Sweden

Intro to rf-SET

Our analysis of SETs has all been done at dc. Is it possible to use SET at high frequencies, also? Yes. One approach: Reflection rf-SET Reflection rf-SET

Schoelkopf et al., Science 280, 1238 (1998).

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SLIDE 22

10 Intro to rf-SET

Basic idea:

  • rf impedance of SET also changes periodically in gate voltage.
  • Make resonator, send in known rf power, and monitor changes in

reflected power as impedance mismatch is varied by SET impedance changes.

Schoelkopf et al., Science 280, 1238 (1998).

  • Since rf carrier can be at a

high frequency (1.7 GHz), it should be possible to see rapid amplitude modulations (MHz).

  • Sensitivity can still be

incredibly high. Using rf-SET electrometer, Prof. Rimberg can “watch”, in real time, as individual electrons tunnel on and off a quantum dot!

rf-SET and Quantum Dot

Lu et al., Nature 423, 422 (2003)

Have made an rf-SET strongly coupled to a GaAs/AlGaAs quantum dot. Resonates at ~ 1 GHz. Can mix reflected wave with incident wave to demodulate. When QD leads are very closed, can see discrete changes in rf- SET offset charge betw/ two states.

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SLIDE 23

11 rf-SET and Quantum Dot

Have shown that number of transition events has peaks at same QD gate voltages that give QD Coulomb blockade peaks. Strongly suggests that rf-SET is measuring individual e- on the QD. Varying QD gate changes preferred state

  • f QD (e.g. usually

charge n, vs. usually charge n+1.

Lu et al., Nature 423, 422 (2003)

rf-SET and Quantum Dot

Lu et al., Nature 423, 422 (2003)

Can see transition rate pick up as QD source- drain bias is increased. Can also monitor fluctuations. In principle, can acquire complete statistical information about current flow! Great potential applications for quantum computation, for example.

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SLIDE 24

12 Summary:

  • While SETs are unlikely to replace regular FETs for a

number of reasons, they can find excellent utility in niche applications, particularly metrology.

  • Single electron pumps can be used for fundamental physics

tests + defining current and capacitance standards.

  • SET electrometers can be incredibly sensitive, allowing

unprecedented precision measurements of surface potentials and charges, possibly even in real time.

  • Coulomb blockade devices can also be used as precision

thermometers.