Reliability of WBG Automotive Traction Inverters Dr Layi Alatise - - PowerPoint PPT Presentation

Underpinning Research

Reliability of WBG Automotive Traction Inverters

Dr Layi Alatise

Associate Professor of Power Electronic Devices University of Warwick

6th June 2018

Underpinning Research

Contents

• 1. SiC Power MOSFETs for Automotive Traction
• 2. Automotive Qualification of Power Semiconductors
• 3. Power Cycling of SiC Devices
• 4. Bias Temperature Instability of SiC Power Devices
• 5. The need for Condition Monitoring
• 6. Conclusions

Underpinning Research

Electric Vehicles

• Power electronic

inverter needed for converting DC power to AC power for motor control

• Power electronics

also needed to charge the battery and interface with different electrical loads in the EV

Underpinning Research

Nissan Leaf Inverter

• Nissan leaf inverter
• Power IGBTs and PiN

diodes on DBC Substrate

• DC-DC Boost converter

needed to step-up battery voltage

• DC link approximately

500 V

• Machine is a permanent

magnet synchronous motor

Underpinning Research

Toyota Prius Inverter

• Toyota Prius inverter
• Power IGBTs and PiN diodes on DBC Substrate
• DC-DC Boost converter needed to step-up battery voltage
• DC link approximately 500 to 600 V
• Machine is a permanent magnet synchronous motor

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TESLA Inverter

• Tesla inverter is comprised of discrete power semiconductors
• Highly unusual not to use a conventional power module
• Motor is an induction motor

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Material Properties of SiC

• SiC technology has a wider bandgap, higher critical field and higher thermal

conductivity compared with silicon

• These make for more efficient power devices with lower losses capable of high

temperature operation

Underpinning Research

Lateral DMOS

Losses in Power MOSFETs

• There are different losses associated with driving power MOSFETs
• These include device losses and gate drive losses
• These losses are associated with the on-state resistance of the device and the

parasitic capacitances that need to be charged and discharged.

Underpinning Research

Contents

• 1. SiC Power MOSFETs for Automotive Traction
• 2. Automotive Qualification of Power Semiconductors
• 3. Packaging Reliability
• 4. Bias Temperature Instability of SiC Power Devices
• 5. The need for Condition Monitoring
• 6. Conclusions

Underpinning Research

JEDEC and AEC101

• JEDEC means the Joint Electron Device Engineering

Council and AEC means the Automotive Electronics Council

• Both regulate the standards for device tests and

reliability

• All commercially available devices must pass these tests
• The tests include

 HTGB (High Temperature Gate Bias)  HTRB (High Temperature Reverse Bias)  THBS (Temperature Humidity Bias Stress Test)  HS (Hot Storage)  TMCL Temperature Cycling  Thermal Fatigue (Otherwise known as Power Cycling)  UHST (Unbiased Humidity Stress Test)

Underpinning Research

High Temperature Gate Bias

• MOSFETs and IGBTs have MOS gates
• The MOS gate stands for Metal-Oxide-Semiconductor
• The Oxide should be a perfect Insulator
• However, defects in the oxide can cause conduction through the oxide
• All MOSFETs must pass 1000 hours of the rated gate voltage at 150 °C
• Electrical Parameters (Threshold Voltage) must not shift by more than

25% otherwise it is classified as a fail

Underpinning Research

High Temperature Gate Bias

• The energy band diagram of the MOS interface shows the band-offsets between

the semiconductor and the insulator

• Carrier’s can tunnel through the oxide, if the electric field is high enough
• Carriers can surmount the band-offset (Field emission)

EG : Energy Bandgap qχ : Electron Affinity of the Semiconductor EC : Conduction Band EV : Valence Band EF: Fermi Level

Underpinning Research OX B A si B OX F MS TH

C N q C Q V                2 2 2 

High Temperature Gate Bias

• Under high temperature gate bias, traps can form in the oxide
• The traps form through a diffusion process, hence, is temperature sensitive
• These oxide traps increase the fixed oxide trap in the gate insulator
• This can change the threshold voltage of the MOSFET depending on the polarity
• f the trapped charge

A reduced threshold voltage is a circuit hazard because of short circuits especially at elevated temperatures

Underpinning Research

High Temperature Gate Bias

Band offsets of different semiconductors

• Because of the wide bandgap (3.4 eV), SiC has a smaller barrier height with SiO2

and is therefore more susceptible to FN tunnelling

• Si has a smaller bandgap and therefore has larger barrier heights with SiO2.
• For most power electronics engineers, SiC still has to prove itself on HTGB

SiC/SiO2 band diagram,

Underpinning Research

High Temperature Reverse Bias

• Mobile ions can lodge in the gate oxide and shift the threshold voltage
• However, defects in the oxide can cause conduction through the oxide
• All MOSFETs must pass 1000 hours at 80% of the rated blocking

voltage at 150 °C

• Electrical Parameters (Threshold Voltage) must not shift by more than

25% otherwise it is classified as a fail

Underpinning Research

High Temperature Reverse Bias

• HTGB is an important test

for detecting ionic contaminants.

• These contaminants will

diffuse into the active area under the influence of temperature and high electric fields

• This occurs in metallisation

processes with defects

• Ionic contaminants can

diffuse into the active area and cause localised threshold voltage shifting

Underpinning Research

High Temperature Reverse Bias

Gate Voltage (V) Drain Current (A)

• Devices that fail under HTRB exhibit significant

subthreshold conduction

• Eventually, the devices dissipate significant off-

state power dissipation Drain Current (A) Gate Voltage (V)

Subthreshold conduction

Underpinning Research

Contents

• 1. SiC Power MOSFETs for Automotive Traction
• 2. Automotive Qualification of Power Semiconductors
• 3. Packaging Reliability
• 4. Bias Temperature Instability of SiC Power Devices
• 5. The need for Condition Monitoring
• 6. Conclusions

Underpinning Research

Power Device Packaging

Through-hole SMD Leadless Through-hole SMD Leadless Wafer-scale

Copper Leadframe Plastic Aluminium wire Chip Solder

Standard TO-220/TO-247 Surface Mount Devices (SOT404)

• The reliability of the power device under temperature cycling depends more on the

packaging than the device

• Different packages perform in different ways

Underpinning Research

Power Device Packaging

Plastic Gold wire Chip Epoxy die-attach

SO8

Fully Encapsulated Packages Power SO8 Package

• SO-8 package has

its advantages regarding module integration, but its poor transient thermal impedance degrades it temperature cycling performance.

• Alternative

packaging techniques can improve the performance under power cycling

Underpinning Research

Power Packaging Tests

DBC Substrate structure for high power applications TOYOTA Prius Inverter comprised of silicon IGBTs

• For some high power applications, custom made DBC substrates are required
• Packaging tests are part of the JEDEC and AEC requirements
• These tests include Temperature cycling, Thermal Shock, Unbiased humidity

stress tests, Thermal Fatigue and Temperature Humidity Bias Stress Tests.

Underpinning Research

Power Packaging Tests

Wire-bond lift-off resulting from power cycling Solder voiding

• The primary indicator of failed

packaging is the thermal resistance, on-state resistance and the gate resistance.

• The thermo-mechanical stress tests

(TMCL, TFAT and TS) probe the integrity of the wire-bonds and die- attach.

• The humidity tests (UHST, THBS)

probe the integrity of the hermetic sealing of the package.

• Power modules are subject to

additional tests depending on the application requirements.

Underpinning Research

Power Module Failure

Thermo-mechanical failure due to stress cycling

Underpinning Research

Power Device Reliability

Solder pad delamination due to thermal cycling Wirebond lift-off due to thermal cycling

Underpinning Research

Contents

• 1. SiC Power MOSFETs for Automotive Traction
• 2. Automotive Qualification of Power Semiconductors
• 3. Packaging Reliability
• 4. Bias Temperature Instability of SiC Power Devices
• 5. The need for Condition Monitoring
• 6. Conclusions

Underpinning Research

Short Circuit Stress Tests

• Unintentional short circuits occur in

power electronic converters

• This subjects the transistor to

simultaneously high forward voltages and high output currents

• This means high instantaneous output

power that can easily destroy the device if the short circuit occurs long enough to raise the junction temperature beyond its rated temperature

• Short circuits can occur if
• Cross-talk between complimenting devices in a phase leg causes

both Q1 and Q2 to turn on simultaneously

• The diode reverse recovery current in Q2 is in phase with a

complimenting transistor Q1 current

Underpinning Research

Crosstalk in Power Converters

For modelling the circuit, the top device is considered as an ideal switch while the model for the bottom device is shown in the equivalent circuit above.

Underpinning Research

Crosstalk induced Short Circuits

Si IGBT Si IGBT SiC SiC

• Parasitic turn-on

gate voltages and short circuit currents are shown for Si IGBT and SiC MOSFET power modules.

• The larger Miller

capacitance in Si IGBTs makes the short circuit current larger compared with the SiC MOSFET module.

• Short circuit currents

increase with Miller capacitance, parasitic gate resistance and turn-on dVDS/dt.

Underpinning Research

Negative Gate Bias in SiC

• Subjecting SiC

devices to negative bias causes parametric drift in the electrical properties.

• Silicon IGBTs are

very robust under similar tests.

• There is still some

work to do to solve this problem

Underpinning Research

Negative Gate Bias in SiC

Underpinning Research

• The implementation of WBG technologies into the

automotive traction systems is impending

• Problems persist in the reliability of SiC devices
• Condition monitoring is a way of addressing some of

these problems (not solving it but containing it)