Recent Research on Memristor Based Circuits Herbert H.C. Iu School - - PowerPoint PPT Presentation

SLIDE 1

1

Recent Research on Memristor Based Circuits

Herbert H.C. Iu

School of Electrical, Electronic and Computer Engineering The University of Western Australia, Australia Presented by H. Iu December 2016

SLIDE 2

2

Contents

 Research team  Introduction of memristor  Memristor based chaotic circuit  Universal mutator for transformations among

memristor, memcapacitor and meminductor

 Coupled memristors  Future work

SLIDE 3

3

Research team

Power and Clean Energy (PACE) Research Group

 Group Leaders – Prof Tyrone Fernando and Prof Herbert Iu  10 PhD students

• Power Electronics, Nonlinear Systems, Smart Grid,

Renewable Energy Systems etc…

 1 Emeritus Professor

SLIDE 4

4

Research areas

 Switching dc/dc converters  Power factor correction circuits  Renewable energy  Smart grid  Memristor based circuits

SLIDE 5

5

Memristor

 What is a memristor?  It is the missing 4th element postulated by L.O. Chua in 1971 [1].  Researchers in Hewlett-Packard announced a solid state

implementation of memristors in 2008 [2].

[1] L.O. Chua, “Memristor - The missing circuit element,” IEEE Transactions on Circuit Theory,

• vol. 18, no. 5, pp. 507-519, 1971.

[2] D.B. Strukov, G.S. Snider, G.R. Stewart and R.S. Williams, “The missing memristor found,” Nature, pp. 80-83, Mar. 2008.

SLIDE 6

6

The four elements in circuit theory

 q = i dt, where q is

the charge

  =  v dt, where  is

the flux

SLIDE 7

7

Circuit theory of memristor

• 1. Charge-controlled memristor

 v = M(q) i, where M(q)= d/dq. M is called memristance.

• 2. Flux-controlled memristor

 i = W() v, where W()= dq/d. W is called memductance.

SLIDE 8

8

How memristance works?

[3] R.S. Williams, “How we found the missing memristor,” IEEE Spectrum, pp. 29-35, Dec 2008.

SLIDE 9

9

How memristance works?

[3] R.S. Williams, “How we found the missing memristor,” IEEE Spectrum, pp. 29-35, Dec 2008.

SLIDE 10

10

HP memristor

 HP memristor is in the form of a partially doped TiO2 thin

film with platinum electrodes.

 M(w)= RON (w(t)/D) + ROFF (1- w(t)/D),

w(t)= v (RON /D) q(t),

where D is the total width of TiO2 film, w(t) is the width of the region of high dopant concentration on the film, ROFF and RON are the limit values

• f the memristance for w(t) =0 and w(t)=D, v is the dopant mobility.

w D A V doped undoped

SLIDE 11

11

Fingerprint -Pinched hysteresis loop

• 1.0
• 0.5

0.0 0.5 1.0

• 10
• 5

5 10 Current(×10-3) Voltage

ω0

10ω0

50 0.0 0.2 0.4 0.6

Change Flux

SLIDE 12

12

Classification

[4] L. O. Chua, “Everything you wished to know about memristors but are afraid to ask,” Radio Engineering, June 2015.

• 1. Ideal memristor
• 2. Generic memristor
• 3. Extended memristor

SLIDE 13

13

Ideal memristor

Current-controlled

 v = M(q) i; dq/dt = i.

Voltage-controlled

 i = W() v; d/dt = v.

SLIDE 14

14

Generic memristor

Current-controlled

 v = M(x) i; dx/dt = f(x,i).

Voltage-controlled

 i = W(x) v; dx/dt = g(x,v).

SLIDE 15

15

Extended memristor

Current-controlled

 v = M(x, i) i ; M(x,0)  ; dx/dt = f(x,i).

Voltage-controlled

 i = W(x, v) v; W(x,0)  ; dx/dt = g(x,v).

SLIDE 16

16

Motivation

 Memristor will have a lot of potential applications, and

some of them will be related to nonlinear dynamics.

 The characteristics and dynamical behaviour of

memristor based systems should be studied in detail.

 Recent studies show that memristor can play a major

role in nonlinear systems.

SLIDE 17

17

Memristor based chaotic circuit

L

L

i

2

C

2

v

1

v

1

C R

[5] H.H.C. Iu et al., “Controlling chaos in a memristor based circuit using twin-t notch filter,” IEEE Transactions on Circuits and Systems Part I, vol. 58, no. 6, pp. 1337-1344, 2011.

1 1 2 1 1 1 2 1 2 2 2

( ) ( ) ( ) ( ) ( ) 1 ( ( ( )) ( )) ( ) ( ) ( ) 1 ( ( )) ( ) ( )

L L

d t v t dt dv t v t v t W t v t dt C R dv t v t v t i t dt C R di t v t dt L                         



φ(t) denotes the magnetic flux between two terminals of a memristor, assume q= a+bφ3

2

( ( )) 3 ( ) W t a b t    



W(φ(t)) is the memductance function,

SLIDE 18

18

Simulation parameters

SLIDE 19

19

Phase portraits

 Chaotic state

R=1800Ω

 Periodic state

R=1600Ω

SLIDE 20

20

Power spectrum diagrams

 Chaotic state  Periodic state

SLIDE 21

21

Bifurcation diagrams

 Phi vs R  v1 vs R

SLIDE 22

22

Twin-T notch filter

( )

in

v t

n

R

n

R 1 2

n

R

n

C

n

C 2

n

C ( )

• v t

1 q

R

2 q

R

1( ) n t

v

2( ) n

t

v

2 1 1 2 2 2 1 2 1

( ) ( ) 0.5 ( ) (2 2 0.5) ( ) (2 1) ( ) 2 ( ) ( ) ( ) 2 ( ) (2 1) ( ) ( ) ( ) ( ) 2 ( ) 2( 1) ( ) 2 ( )

n in in

• n

n n n n in n

• n

n n

• in

n

• n

n n

dv t dv t v t q q v t q v t qv t q dt dt R C dv t dv t v t q v t v t dt dt R C dv t dv t v t q v t v t dt dt R C                           

SLIDE 23

23

Input-output transfer function

2 2 2 2 2 2

1 ( ) ( ) 4 1 ( ) (1 )

• n

n in n n n n

s V s R C F s V s s q s R C R C      

SLIDE 24

24

Schematic of the MCC with notch filter controller

L

L

i

2

C

2

v

1

v

1

C R

n

R

n

R 1 2

n

R

n

C

n

C 2

n

C

1

R

1

R

3

R

3

R ( )

• i t

1 q

R

2 q

R

SLIDE 25

25

Experimental prototype

SLIDE 26

26

Results of notch filter control

SLIDE 27

27

Experimental results- phase portraits

 v2 vs phi  v2 vs v1

SLIDE 28

28

Experimental results- power spectrum

 Before connection -

Chaotic state

 After connection -

Periodic state

SLIDE 29

29

Memristor emulator

[6] D.S. Yu, H.H.C. Iu et al., “A floating memristor emulator based relaxation oscillator” IEEE Transactions on Circuits and Systems Part I, vol. 61, no. 10, pp. 2888-2896, 2014.

y

x z

U1 U2 U3

y

x z

U4

3

R

10

R

MR

i A

B

y

x z

y x

z

4

R

1

C

1

x

2

x

2

y

1

y

z

w

AD633

U5

6

R

5

R

7

R

s

v

8

R

9

R

U6

AB

v

MR

i

p p

1

i

2

i

y1

v

w

v

c1

v

r10

v

4 8 9 7 7 MR AB AB s 3 8 10 5 3 1 6

( ) 1 10 R R R R R i v v R R R R R C R           

 

AB AB

W     



W(φ(t)) is the memductance.

 

4 7 8 9 2 3 5 1 8 10

, 10 R R R R R R C R R     

4 7 8 9 s 3 6 8 10

= 10 R R R R v R R R R   

• 2
• 1

1 2

• 6
• 4
• 2

2 4 6

35.4Hz 120Hz 17.6Hz

vr10(V)

vAB(V)



Emulator consists of 4 current conveyors, 1 op amp, 1 multiplier, 1 capacitor and several resistors.

SLIDE 30

30

Serial and Parallel Connections

• 2
• 1

1 2

• 0.2

0.0 0.2

iMR(mA)

vAB(V)

Parallel

W

Serial W

A B B A

W

Parallel Serial

MR

i

MR

i

W W

0.90 0.92 0.94 0.96 0.98 1.00 0.05 0.10 0.15 0.20 0.25 0.30 Memductance(mS)

t(s)

Serial W Parallel

SLIDE 31

31

Introduction of Memcapacitor

[7] M. Di Ventra, Y. V. Pershin, and L. O. Chua, “Circuit elements with memory: memristors, memcapacitors and meminductors,” Proc. IEEE, vol. 97, no. 10, pp. 1717–1724, Oct. 2009.

SLIDE 32

32

Introduction of Meminductor

 I

SLIDE 33

33

A Universal Mutator

[8] D.S. Yu, Y. Liang, H.H.C. Iu and L.O. Chua, “A Universal Mutator for Transformations among Memristor, Memcapacitor and Meminductor,” IEEE Transactions on Circuits and Systems Part II, vol. 61, no. 10, pp. 758-762, 2014.

x

y

z

+1

U3

p

v

x

y

z

x

y

z

+1 +1

U1 U2

1 2 3 4 5

2z

v

p

p

3z

v

i

A

B

C

D E F  Mutator consists of 3 common

transimpedance operational amplifiers (TOAs)

 Position 4 is used for memory

elements.

 Positions 1, 2, 3 and 5 contain only

resistors or capacitors.

SLIDE 34

34

Case study: MR to MC

2

R

x

y

z

+1

U3

p

MC

v

x

y

z

x

y

z

+1 +1

U1 U2

2z

v

p

p

3z

v

MC

i

A

B

C

D

m

G

3

R

1

C

5

R

m MR

G    

 At position 4,

Cm=GmC1R3R5/R2

 From terminal AB,

SLIDE 35

35

MR to MC : Experimental Results

• 1

1

• 6
• 4
• 2

2 4 6 52.9Hz 38.6Hz

qMC(uC) vMC(V)

27.5Hz

• 2
• 1

1 2 1 2 3 4 5

52.9Hz 38.6Hz 27.5Hz

Cm=1.64F Cm=3.95F Cm(F) vMC(V)

Measured pinched hysteretic loops Variation curve of Cm along with terminal voltages

SLIDE 36

36

Summary of Transformations

x

y

z

+1

U3

p

v

x

y

z

x

y

z

+1 +1

U1 U2

1 2 3 4 5

2z

v

p p

3z

v

i

A

B

C

D E F

SLIDE 37

37

Coupled Memristors

[9] D.S. Yu, H.H.C. Iu, Y. Liang, T. Fernando and L.O. Chua, “Dynamic Behavior of Coupled Memristor Circuits,” IEEE Transactions on Circuits and Systems Part I, vol. 62, no. 6, pp. 1607-1616, June 2015.

( ) ( ) ( ) i t W v t  

( ) ( ) dq W d    

1 1 1 2 1

( ) ( , ) ( ) i t W v t   

2 2 1 2 2

( ) ( , ) ( ) i t W v t   

1 1( )

d v t dt  

2 2( )

d v t dt  

Flux controlled memristor model: A flux controlled and coupled ideal MR system:

( ) W     

SLIDE 38

38

A Flux Controlled and Coupled Ideal MR system

1 1 2 1 1 1 2 2

( , ) W          

2 2 1 2 2 2 1 1

( , ) W          

1



2



MR1 MR2

1

A

2

A

2

B

1

B

SLIDE 39

39

Coupled MRs in Serial Connections

Serial MR Circuit with Identical Polarities

1



2



MR1 MR2

B2 A1

1

v

2

v

12 1 2

v v v  

1 1 1 2 2 2 2 1

( , ) ( , ) i vW v W      

12 1 2

    

1 1 1 1 2 2 2 2 2 2 1 1

( ) ( ) i v v                

SLIDE 40

40

Coupled MRs in Serial Connections

Serial MR Circuit with Identical Polarities

1



2



MR1 MR2

B2 A1

1

v

2

v

1 12 2 2 2 1 1 1 1 1 2 2 2 1 2

( ) ( ) ( ) d v dt                      

2 12 1 1 1 2 2 1 1 1 2 2 2 1 2

( ) ( ) ( ) d v dt                      

SLIDE 41

41

Coupled MRs in Serial Connections

For the special case of α1=α2=α and κ1=κ2=α,

1



2



MR1 MR2

B2 A1

1

v

2

v

1 12 2 12 12 1 2

2 d v dt          

2 12 1 12 12 1 2

2 d v dt          

SLIDE 42

42

Coupled MRs in Serial Connections

Assume that the initial value of φ12 is zero,

1



2



MR1 MR2

B2 A1

1

v

2

v

 

1 12 2 1 12 1 2

1 2 ( )ln(2 ) 4             

 

2 12 1 2 12 1 2

1 2 ( )ln(2 ) 4             

Memductance of individual MR can be obtained,

1 1 2 1 1 1 2 2

( , ) W          

2 2 1 2 2 2 1 1

( , ) W          

SLIDE 43

43

Coupled MRs in Serial Connections

For further simplification we assume β1=β2=β,

1



2



MR1 MR2

B2 A1

1

v

2

v

1 2 12

1 2     

1 2 12

1 2 v v v  

1 2 12

W W     

The memductance of each coupled MR can be written as, Two coupled MRs serially connected with identical polarities operate as a new MR with a new memductance value of W12=W1/2=W2/2=(α12(t)+)/2.

SLIDE 44

44

Coupled MRs in Serial Connections- Simulation Results

Serial MR Circuit with Identical Polarities

1 2 12 1 2

WW W W W  

• 0.6
• 0.4
• 0.2

0.0 0.2 0.4 0.6

• 4
• 3
• 2
• 1

1 2 3 4

W12(with initial flux=0.02Wb)

i (mA)

v12,v1,v2 (V)

Identical Polarities W2 W12 W1

• 4
• 2

2 4 6 8 10 12 14 0.1 0.2 0.3 0.4

1 2 12 1 2

WW W W W   Memductance (mS)

Identical Polarities

W2 W1 × 10-6

q (C)

0.00 0.05 0.10 0.05 0.10 0.15 0.20

2

2

2



2

 

2

2 

Memductance W12 (mS)

12(Wb)



2

3  Identical Polarities

Initial Memductance

1



2



MR1 MR2

B2 A1

1

v

2

v

SLIDE 45

45

Coupled MRs in Parallel Connections

Parallel MR Circuit with Identical Polarities

1



2



MR1 MR2

A1 B2

1

v

2

v

1

i

2

i

12

v i

1 2

i i i  

12 1 2

    

1 1 1 1 2 2 2 2 2 2 1 1

( ) ( ) i v v                

12

1 2 1 2 1 2 12

2

1 ( ) ( ) 2 q              

SLIDE 46

46

Coupled MRs in Parallel Connections

Parallel MR Circuit with Identical Polarities

1



2



MR1 MR2

A1 B2

1

v

2

v

1

i

2

i

12

v i

12 12 12 1 2 1 2 12 1 2 12

( ) ( ) ( ) dq W d                 

Two flux coupled MRs in parallel connection operates as a new flux controlled MR, and the equivalent memductance is equal to the sum of individual memductances.

SLIDE 47

47

Coupled MRs in Parallel Connections- Simulation Results

Parallel MR Circuit with Identical Polarities

1



2



MR1 MR2

A1 B2

1

v

2

v

1

i

2

i

12

v i

• 3
• 2
• 1

1 2 3

• 2.0
• 1.5
• 1.0
• 0.5

0.0 0.5 1.0 1.5 2.0

i1,i2,i (mA) v12 (V)

Identical Polarities W2 W12 W1

• 0.02

0.00 0.02 0.04 0.06 0.08 0.2 0.4 0.6 0.8 1.0 1.2

Identical Polarities Memductance (mS)

12(Wb)



2

3

2



2

 

2

3 

SLIDE 48

48

Conclusion

 A memristor based chaotic circuit is contructed.  A universal mutator for transformations of memristror,

memcapacitor and meminductor is developed.

 Dynamic behaviour of coupled memristor based circuits

is studied.

SLIDE 49

49

Future work

 Study other circuit elements with memory:

memcapacitor and meminductor.

 Develop other applications of memristor based circuits,

e.g. synchronization and consensus of coupled memristor based circuits.

SLIDE 50

50

References

[1] L.O. Chua, “Memristor - The missing circuit element,” IEEE Transactions on Circuit Theory, vol. 18,

• no. 5, pp. 507-519, 1971.

[2] D.B. Strukov, G.S. Snider, G.R. Stewart and R.S. Williams, “The missing memristor found,” Nature, pp. 80-83, Mar. 2008. [3] R.S. Williams, “How we found the missing memristor,” IEEE Spectrum, pp. 29-35, Dec. 2008. [4] L. O. Chua, “Everything you wished to know about memristors but are afraid to ask,” Radio Engineering, June 2015. [5] H.H.C. Iu et al., “Controlling chaos in a memristor based circuit using twin-t notch filter,” IEEE Transactions on Circuits and Systems Part I, vol. 58, no. 6, pp. 1337-1344, 2011. [6] D.S. Yu, H.H.C. Iu et al., “A floating memristor emulator based relaxation oscillator” IEEE Transactions

• n Circuits and Systems Part I, vol. 61, no. 10, pp. 2888-2896, 2014.

[7] M. Di Ventra, Y. V. Pershin, and L.O. Chua, “Circuit elements with memory: memristors, memcapacitors and meminductors,” Proc. IEEE, vol. 97, no. 10, pp. 1717–1724, Oct. 2009. [8] D.S. Yu, Y. Liang, H.H.C. Iu and L.O. Chua, “A Universal Mutator for Transformations among Memristor, Memcapacitor and Meminductor,” IEEE Transactions on Circuits and Systems Part II, vol. 61,

• no. 10, pp. 758-762, 2014.

[9] D.S. Yu, H.H.C. Iu, Y. Liang, T. Fernando and L.O. Chua, “Dynamic Behavior of Coupled Memristor Circuits,” IEEE Transactions on Circuits and Systems Part I, vol. 62, no. 6, pp. 1607-1616, June 2015.