Pulsar: A Wireless Propagation-Aware Clock Synchronization Platform Adwait Dongare , Patrick Lazik, Niranjini Rajagopal, Anthony Rowe RTAS ’17, Pittsburgh PA April 19, 2017 1
Accurate Timekeeping Antiquity: Communication: Navigation GSM Spanner Kdb+ Sensing: Databases LIGO 2
Motivating Applications c = 299792458 m / s Human Structural 1 nsec: 30 cm Response Vibration Speed-of-Light Virtual Localization Reality TDMA Sound Distributed Antenna Arrays OS Scheduling Robotics Physics Control sec msec μ sec nsec time 3
Overview • Motivation • The Pulsar Platform • Analysis and Evaluation 4
Focus: Next-Generation Wireless (1/2) 2X Spectrum (Hz) Spectral Space Efficiency (bits/sec/Hz/M 2 ) (bits/sec/Hz) 2X >10X Bell Labs, “The Future X Networks”, 2016 5
Focus: Next-Generation Wireless (2/2) Spatial Multiplexing apple.com, airport extreme 6
How Is It Done Today? • Currently • Multiplexing on single access point (AP) • Carefully matched signal path • Software-defined radios (SDR) are popular research platforms • Accurate synchronization → 10 MHz 1 PPS Multiplexing on multiple APs 7
Clock Synchronization • Time → events • Clock → counting “regular” events • Clock synchronization → agreement on start & counts per epoch • Time synchronization → agreement with standard reference (like UTC) 10.000 1 10 propagation t david David delay L 62.003 ToF = L / c wire Allan t allan 51 62 propagation-aware 8
Propagation Delay M • Two-way messaging ‣ Network Delay (e.g. NTP) D2 D1 ‣ Propagation Time Delay • Can compensate for propagation delay if distances D12 D11 are known 9
Overview • Motivation • The Pulsar Platform • Analysis and Evaluation 10
Ideal Time-Transfer Platform Objective: Time-transfer - sharing Ideal a time reference across locations {0, t 0 } Clock Capabilities Reference • Perfect event timestamps {x, t} • Perfectly-timed actions with timestamp Ideal {x i , t i } event i Clock Requirements t j act j, {x j, t j } • Timing: Ideal clocks Ideal Platform • Ranging: Infinite bandwidth 11
Our Pulsar Platform F in % F out % Tune% PPS in % PPS out % Antenna% DW1000% • Stable clock: Chip%Scale%% LMX2571% Chip-scale atomic clock Atomic%Clock% • Ultra-wideband ranging radio: 15.6 ps hardware timestamps RPI%2%Header% • Glue logic: ARM%K22F% • Low-jitter phase-locked loop • ARM processor • Phase measurement unit • We implement time-of-flight (propagation-aware) clock synchronization Hardware repository: https://upverter.com/WiselabCMU/eab20f02c4d4f096/Pulsar-V2/ 12
Overview • Motivation • The Pulsar Platform • Analysis and Evaluation 13
Problem: Message Passing for Clock Synchronization • Frequency estimation: t’ i-1:TX t” i-1:RX one-way messaging f child = t 00 i:RX − t 00 i i-1:RX y i = f reference t 0 i:TX − t 0 i-1:TX i t” R(i-1):TX t’ R(i-1):RX • Time-of-flight estimation: t’ i:TX two-way messaging t” i:RX � � � � t 0 R(i):RX − t 0 t 00 R(i):TX − t 00 − i:TX i:RX ∆ t i TOF = 2 • Accurate timestamps t” R(i):TX t’ R(i):RX • Clocks must remain stable ref child between message exchanges clock clock child ref node node 14 < = =
Problem: Clock Stability 1 0.5 0 − 0.5 Frequency (ppm) − 1 − 1.5 • Clock accuracy → δ f/f ( ppm ) − 2 − 2.5 • Clock stability → accuracy − 3 − 3.5 over time: Allan variance − 4 0 2 4 6 8 10 12 14 16 y ( ⌧ ) = 1 Time (day) 10 2 � 2 y i � 1 ) 2 ↵ ⌦ (¯ y i − ¯ Lan 2 i 10 1 PPS Allan deviation (ppm) • Clock synchronization will 10 0 Micro degrade over time 10 − 1 10 − 2 < = 10 − 3 10 0 10 1 10 2 10 3 10 4 10 5 Time interval (s) Time between frequency samples(y i , y i-1 ) 15 D. Mills, Computer Network Time Synchronization =
Allan Deviation phase 10 -7 y c n line e u q Allan intercept e r f e n 10 -8 i l Allan Deviation < y ( = ) 10 -9 time ⟷ phase 10 -10 Quartz 10 -11 TCXO CSAC CSAC Datasheet 10 -12 10 -2 10 -1 10 0 10 1 10 2 = (sec) Time between frequency samples OR Averaging time 16
Problem: Phase Synchronization 1 PPS reset radio Clock clock (CSAC) 10 MHz Phase 38.4 MHz Lock Loop UWB Radio (DW1000) tuning message & MCU timestamp • Precise timing for e.g. SDR ✓ • Frequency input: 10 MHz ?? • Phase/time input: 1 PPS 17
Problem: Clock Phase Offset Voltage 1 PPS → reset • Radio clock does not reset transition exactly at desired time level • Electronic rise time • Digital I/O time time discretization δ t CPO (38.4 MHz ~ 26 nsec) • Offsets are constant after PLL 38.4 MHz lock • PMU for δ t CPO measurement time 18
Pulsar Architecture 1 PPS reset radio Clock clock (CSAC) 10 MHz Phase 38.4 MHz Lock Loop UWB Radio (DW1000) δ t CPO PMU Δ t TOF tuning message & MCU timestamp Δ f Δ t PPS 19
Synchronization Protocol • Proof-of-concept protocol M • Algorithm D2 D1 ‣ Frequency synchronization D12 D11 ‣ Phase synchronization -2 12 7 6 ‣ Phase bootstrap -3 10 4 -4 Log (variance) 8 1 Meters • Time distribution tree 3 -5 6 5 4 -6 2 -7 • Timestamp variance as a 2 (Master) 0 -8 simple link metric -2 -5 0 5 10 15 20 25 Meters 20
Evaluation 80 Reference Child 7 =2.12 nsec < =0.84 nsec Node Node 60 1PPS 1PPS counts 40 Logic Analyzer 20 ground estimate 0 -1 0 1 2 3 4 5 truth Error in " t PPS : corrected (nsec) Δ t PPS Δ t PPS:estimate ϵ t Δ t PPS = Δ t PPS:estimate + ϵ t Software repository: http://git.wise.ece.cmu.edu/adwait/pulsar_freertos 21
Future Work • Testing lower cost OCXOs (~$100/ clock) e.g. CW-OH200 Series • Phase-measurement unit integration • Testing other flexible and robust synchronization protocols • SDR synchronization with Pulsar 22
Conclusions • Pulsar: Platform & protocol F in % F out % Tune% PPS in % PPS out % DW1000% Antenna% Chip%Scale%% LMX2571% for better than 5 nsec Atomic%Clock% clock synchronization (below 26 nsec digital time discretization of radio RPI%2%Header% ARM%K22F% components) F in % F out % Tune% PPS in % PPS out % DW1000% Antenna% Chip%Scale%% LMX2571% Atomic%Clock% • End-to-end evaluation and RPI%2%Header% ARM%K22F% analysis of timing errors ! • Provide precise timing for an application (SDR) to enable spatial multiplexing F in % F out % Tune% PPS in % PPS out % DW1000% Antenna% Chip%Scale%% LMX2571% Atomic%Clock% RPI%2%Header% ARM%K22F% 23
Thank you 24
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