SLIDE 7 Ad Hoc and Sensor Networks – Roger Wattenhofer – 9/25 Ad Hoc and Sensor Networks – Roger Wattenhofer –
- Given a communication network
1. Each node equipped with hardware clock with drift 2. Message delays with jitter
- Goal: Synchronize Clocks (“Logical Clocks”)
- Both global and local synchronization!
Theory of Clock Synchronization
worst-case (but constant)
Ad Hoc and Sensor Networks – Roger Wattenhofer – 9/26 Ad Hoc and Sensor Networks – Roger Wattenhofer –
- Time (logical clocks) should not be allowed to stand still or jump
- Let’s be more careful (and ambitious):
- Logical clocks should always move forward
- Sometimes faster, sometimes slower is OK.
- But there should be a minimum and a maximum speed.
- As close to correct time as possible!
Time Must Behave!
Ad Hoc and Sensor Networks – Roger Wattenhofer – 9/27 Ad Hoc and Sensor Networks – Roger Wattenhofer –
Formal Model
- Hardware clock Hv(t) = s[0,t] hv(¿) d¿
with clock rate hv(t) 2 2 [1-²,1+²]
- Logical clock Lv(·) which increases
at rate at least 1 and at most ¯
- Message delays 2 [0,1]
- Employ a synchronization algorithm
to update the logical clock according to hardware clock and messages from neighbors
Clock drift ² is typically small, e.g. ² ¼10-4 for a cheap quartz oscillator Neglect fixed share of delay, normalize jitter Logical clocks with rate less than 1 behave differently (“synchronizer”)
Time is 140 Time is 150 Time is 152
Lv?
Hv
Ad Hoc and Sensor Networks – Roger Wattenhofer – 9/28 Ad Hoc and Sensor Networks – Roger Wattenhofer –
Synchronization Algorithms: An Example (“Amax”)
- Question: How to update the logical clock
based on the messages from the neighbors?
- Idea: Minimizing the skew to the fastest neighbor
– Set the clock to the maximum clock value received from any neighbor (if larger than local clock value) – forward new values immediately
- Optimum global skew of about D
- Poor local property
– First all messages take 1 time unit… – …then we have a fast message!
Time is D+x Time is D+x
…
Clock value: D+x Old clock value: D+x-1 Old clock value: x+1 Old clock value: x Time is D+x
New time is D+x New time is D+x
skew D!
Allow ¯ = 1
Fastest Hardware Clock