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Clock Synchronization Synchronization Clock Henrik Lnn - PDF document

Parallel and Distributed Systems: Clock Synchronization Clock Synchronization Synchronization Clock Henrik Lnn Electronics & Software Volvo Technological Development VTD Electronics and Software Parallel and Distributed Systems: Clock


  1. Parallel and Distributed Systems: Clock Synchronization Clock Synchronization Synchronization Clock Henrik Lönn Electronics & Software Volvo Technological Development VTD Electronics and Software Parallel and Distributed Systems: Clock Synchronization Contents Contents • General • Types of Synchronisation • Faults and problems to cope with • Example algorithms • Transmission delays • Derivation of criterion n>3m • Derivation of clock precision VTD Electronics and Software 1

  2. Parallel and Distributed Systems: Clock Synchronization Why do do we we need need an an agreed agreed time? time? Why • Consistent inputs/outputs • Control loops • Rollback recovery • Time-triggered task execution • Resource utilization ECU ECU VTD Electronics and Software Parallel and Distributed Systems: Clock Synchronization Clock Synchronization Synchronization Clock • Internal vs. External • Master-Slave vs. Distributed • Hardware vs. software VTD Electronics and Software 2

  3. Parallel and Distributed Systems: Clock Synchronization Synchronization Goals Goals: : Synchronization • High Precision -Small deviation, or skew, between clocks • High Accuracy - Small deviation to external time • Monotonic and “Continuous” time VTD Electronics and Software Parallel and Distributed Systems: Clock Synchronization Clock drift Clock drift − < ρ d C 1 dt i or ) ( ) ) ( ) ( ( ρ − ≤ − ≤ ρ − 1- t t t t 1+ t t 2 1 2 1 2 1 • Why should clock drift be small? Generally: All users of the clock service require a certain accuracy & precision => Clock synchronization must be performed more often with large drift VTD Electronics and Software 3

  4. Parallel and Distributed Systems: Clock Synchronization How often How often should should we we re- -synchronize synchronize? ? re – ρ : A rate deviation from external time (s/s) – R: Time between synchronizations – ∆ s : Precision after synchronization Skew increase by R*2 ρ between two synchronizations ⇒ Choose R so that ∆ s +R*2 ρ < Req. precision VTD Electronics and Software Parallel and Distributed Systems: Clock Synchronization How often often should should we we How re- -synchronize synchronize? ? re • Loosely coupled systems: – Inaccurate, expensive clock readings=> Use high accuracy clocks, synchronize seldom • Tightly coupled systems: – Accurate clock readings=> Use low accuracy clocks and synchronize often (∆ s +R*2 ρ < Req. precision) VTD Electronics and Software 4

  5. Parallel and Distributed Systems: Clock Synchronization Rate adjustment adjustment Rate • Clock rate is adjusted – Required adjustment: ∆ – Time between adjustments: R => Adjust rate with ∆ /R VTD Electronics and Software Parallel and Distributed Systems: Clock Synchronization Oscillators Oscillators • Inverters • RC oscillators 10 -3 • Quartz oscillators 10 -6 VTD Electronics and Software 5

  6. Parallel and Distributed Systems: Clock Synchronization Hardware clock clock synchronization synchronization Hardware • Use a “clock distribution network” – Much hardware required – Very good precision Collection of Clock readings VTD Electronics and Software Parallel and Distributed Systems: Clock Synchronization Phase Locked Loop Locked Loop Phase ≈ feedback control loop φ i φ r V c Oscillator Comparator Filter (VCO) VTD Electronics and Software 6

  7. Parallel and Distributed Systems: Clock Synchronization Full connectivity Full connectivity not not required required A cluster is fully connected internally and connected to at least one clock in each cluster p i +M-1 ≥ 3m+1 “Number of Clock inputs > 3 times number of faults” • M number of clusters • p i clocks in cluster i • m faulty clocks are tolerated VTD Electronics and Software Parallel and Distributed Systems: Clock Synchronization Software clock clock synchronisation synchronisation: : Software • Use messages – Cheap in hardware – Flexible – Low precision Current time is 1500 VTD Electronics and Software 7

  8. Parallel and Distributed Systems: Clock Synchronization Hardware assisted Hardware assisted Software Software clock clock synchronisation: : synchronisation • Use messages whose exact point of arrival is recorded by hardware – Cheap in hardware – high precision on suitable topology Current time is 1500 Beep! Exact arrival time is 15:01 VTD Electronics and Software Parallel and Distributed Systems: Clock Synchronization Use of of pre pre- -scheduled scheduled events as events as Use clock readings readings clock TDMA: Time Division Multiple Access CC: 0 1 ... CC max 0 1 t Communication Cycle, CC Message t from node: 0 1 ... max 0 1 VTD Electronics and Software 8

  9. Parallel and Distributed Systems: Clock Synchronization Faults Faults • Excessive drift • Clock reading errors • Byzantine faults (“Dual-faced” clocks) – The faulty clock gives different readings to different nodes VTD Electronics and Software Parallel and Distributed Systems: Clock Synchronization Cliques Cliques Clock groups that are mutually unsynchronized – Clock synch. algorithm must prevent this! A B C D E F Slowest Slower Slow Fast Faster Fastest This group follows clock B This group follows clock E VTD Electronics and Software 9

  10. Parallel and Distributed Systems: Clock Synchronization Byzantine faults faults Byzantine • Effect on a ”sensible” algorithm: (Syncronize to median of clock readings): C C C A B D E I’m slowest “I’m Slower” “I’m Slow” “I’m Fast” “I’m Faster” I’m fastest Faulty This group will follow clock B This group will follow clock D Byzantine lie • Solution: Use a fault tolerant algorithm. • 3m+1 clocks to tolerate m clock failures VTD Electronics and Software Parallel and Distributed Systems: Clock Synchronization Convergence vs vs Consistency Consistency Convergence The presented algorithms Algorithms Algorithms are of this type • Interactive convergence algorithms – Adjustment function guarantees limited clock skew in spite of faulty clocks and different sets of clock readings • Interactive consistency algorithms – Agreement algorithm guarantees that all sets of clock readings are identical. Adjustment function is “arbitrary”, take e. g. median VTD Electronics and Software 10

  11. Parallel and Distributed Systems: Clock Synchronization Interactive convergence Interactive convergence algorithm algorithm (CA1) (CA1) • Collect clock readings • Replace values larger than max with an arbitrary value smaller than max • Take average of clock readings Collection of Clock readings Local Clock Modulo External clock Clock deviation Who's first Up 2*max detector (Twos complement) counter Dn VTD Electronics and Software Parallel and Distributed Systems: Clock Synchronization Fault Tolerant Tolerant Average Average algorithm algorithm Fault (CA2) (CA2) • Mean of clocks excluding t fastest and t slowest Readings from different clocks New clock value VTD Electronics and Software 11

  12. Parallel and Distributed Systems: Clock Synchronization Midpoint algorithm algorithm Midpoint • Mean of fastest and slowest excluding t fastest and t slowest Readings from different clocks New clock value VTD Electronics and Software Parallel and Distributed Systems: Clock Synchronization Convergence Nonaveraging Nonaveraging Convergence Algorithm (CNA) (CNA) Algorithm • Resynchronization interval=R • At synchronization i: – If clock reaches iR, send synchronization message – Adjust time to iR if synchronization message arrive in time, and relay message – Ignore synchronization messages that arrive too early or too late (adjustment i has been done) VTD Electronics and Software 12

  13. Parallel and Distributed Systems: Clock Synchronization Transmission delays delays: : Transmission • Hardware/Hybrid environment: Speed of light 3 ns/m • Software environment: (Bounded) Message delays Transmission delay Time is now 15.00! Not more? I have to set back my clock! VTD Electronics and Software Parallel and Distributed Systems: Clock Synchronization Reducing effects effects of of message message Reducing delay in in loosely loosely coupled coupled systems: systems: delay • Incoming messages receive a timestamp by hardware • Before a message is relayed, its clock value is increased by the time spent in the node VTD Electronics and Software 13

  14. Parallel and Distributed Systems: Clock Synchronization Probabilistic Clock Clock Synch Synch. . Probabilistic Time is C remote ! Reply sent, tr Reply arrives, t1 Request sent, t0 Request arrives Stochastic, additional delay Stochastic, additional delay Minimum message delay Minimum message delay Request sent, t0 Reply arrives, t1 VTD Electronics and Software Parallel and Distributed Systems: Clock Synchronization Probabilistic Clock Clock Synch Synch. . Probabilistic 1) Request reference clock reading from master - Request sent at t 0 and clock reading C remote received at t 1 2) Assume that reading instant is C local =(t 0 +t 1 )/2 and calculate clock deviation C local -C remote Make multiple readings until t 1 -t 0 < threshold – Total delay=t 1 -t 0 – Total stochastic delay, d stoch =(t 1 -t 0 ) -2*d min – t 0 +d min < t r <t 0 +d min + d stoch – Choose midpoint => error<d stoch /2 VTD Electronics and Software 14

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