Overview • Provide Services (done) – processes (done) – files (briefly here, more in cs4513) • Manage Devices Operating Systems – processor (done) – memory (next!) – disk (done after files) Memory Management (Ch 4: 4.1-4.2) Simple Memory Management Simple Memory Management • Small, protected OS, drivers • One process in memory, using it all – DOS – each program needs I/O drivers Device OS ROM Drivers ROM – until 1960 User User RAM Prog RAM User I/O drivers RAM Prog Prog User RAM OS Prog OS • “Mono-programming” -- No multiprocessing! - Early efforts used “Swapping”, but slooooow Multiprocessing w/Fixed Partitions Address Binding Simple! • Compile Time Source Partition 4 – maybe absolute binding ( .com ) Partition 4 900k Compile • Link Time Partition 3 Partition 3 Object – dynamic or static libraries 500k • Load Time Partition 2 Partition 2 Link 300k Partition 1 – relocatable code Load Partition 1 200k • Run Time OS Module OS – relocatable memory segments Load (a) (b) RAM – overlays • Waste large partition Binary • Unequal queues – paging • Skip small jobs Run Hey, processes can be in different memory locations! 1
Load Time Dynamic Linking Normal Linking and Loading Printf.c Printf.c Main.c Main.c gcc gcc gcc gcc Printf.o Main.o Printf.o Main.o • Save disk space. Linker Linker • Libraries move? X Window code: ar ar - 500K minimum • Moving code? a.out Static Dynamic a.out - 450K libraries • Library versions? Library Library • Load time still Loader Loader the same. Memory Memory Memory Linking Performance Run-Time Dynamic Linking Comparisons Printf.c Main.c Linking Disk Load Run Run Run Time gcc gcc Method Space Time Time Time (0 used) (4 used) (2 used) Printf.o Main.o 3Mb 3.1s 0 0 0 Static Linker ar Save disk space. Startup fast. 1Mb 3.1s 0 0 0 Load Dynamic a.out Might not need all. Time Library Loader 1Mb 1.1s 2.4s 1.2s 0 Run Run-time Time Loader Memory Design Technique: Static vs. Dynamic Logical vs. Physical Addresses • Compile-Time + Load Time addresses same • Static solutions • Run time addresses different – compute ahead of time – for predictable situations • Dynamic solutions Relocation Logical Physical – compute when needed Register Address Address CPU Memory – for unpredictable situations 14000 346 14346 • Some situations use dynamic because static + too restrictive ( malloc ) MMU • ex: memory allocation, type checking • User goes from 0 to max • Physical goes from R +0 to R + max 2
Relocatable Code Basics Variable-Sized Partitions • Allow logical addresses • Idea: want to remove “wasted” memory that • Protect other processes is not needed in each partition • Definition: Memory Limit Reg Reloc Reg – Hole - a block of available memory yes – scattered throughout physical memory < + CPU • New process allocated memory from hole physical no address MMU large enough to fit it error • Addresses must be contiguous! Variable-Sized Partitions Memory Request? OS OS OS OS • What if a request for additional memory? process 5 process 5 process 5 process 9 process 9 8 done 9 arrv 10 arrv OS process 8 process 10 5 done process 3 malloc(20k)? process 2 process 2 process 2 process 2 process 8 • OS keeps track of: – allocated partitions process 2 – free partitions (holes) – queues! External Fragmentation Internal Fragmentation • Have some “empty” space for each • External Fragmentation - total memory processes space exists to satisfy request but it is not A stack contiguous OS Room for growth Allocated to A 50k A data process 3 A program ? 125k Process 9 process 8 OS • Internal Fragmentation - allocated memory 100k may be slightly larger than requested process 2 memory and not being used. “But, how much does this matter?” 3
Compaction Analysis of External Fragmentation • Shuffle memory contents to place all free memory together in one large block • Assume: • Only if relocation dynamic! – system at equilibrium • Same I/O DMA problem – process in middle (a) (b) – if N processes, 1/2 time process, 1/2 hole OS OS OS + ==> 1/2 N holes! 50k process 3 – Fifty-percent rule process 3 90k process 8 – Fundamental: 125k Process 9 + adjacent holes combined process 8 60k process 8 + adjacent processes not combined 100k process 3 process 2 process 2 process 2 Cost of Compaction Solution? process 1 process 1 50k process 3 • Want to minimize external fragmentation process 3 90k process 8 – Large Blocks process 2 60k – But internal fragmentation! process 8 • Tradeoff 100k – Sacrifice some internal fragmentation for process 2 reduced external fragmentation • 128 MB RAM, 100 nsec/access – Paging � 1.5 seconds to compact! • Disk much slower! Where Are We? Paging • Memory Management • Logical address space noncontiguous; – fixed partitions (done) – linking and loading (done) process gets memory wherever available – variable partitions (done) – Divide physical memory into fixed-size blocks • Paging ← ← + size is a power of 2, between 512 and 8192 bytes + called Frames • Misc – Divide logical memory into bocks of same size + called Pages 4
Paging Example Paging • Address generated by CPU divided into: • Page size 4 bytes 0 • Memory size 32 bytes (8 pages) 1 Page 0 – Page number (p) - index to page table + page table contains base address of each page in 2 physical memory (frame) 3 Page 2 – Page offset (d) - offset into page/frame Page 0 0 1 Page 1 4 Page 1 1 4 CPU p d f d 5 Page 2 2 3 physical 6 Page 3 3 7 f memory Page 3 7 Logical Page Table Memory Physical page table Memory Paging Example Paging Hardware Offset 000 Page 0 000 • address space 2 m 001 001 0 0 1 0 1 1 phsical • page offset 2 n 010 Page 1 010 Page Frame memory • page number 2 m-n 2 m bytes 011 011 00 01 100 Page 2 100 01 11 page number page offset 101 101 p d 10 00 m-n n 110 110 Page 3 11 10 111 • note: not losing any bytes! 111 Page Table Physical Logical Memory Memory Paging Example Another Paging Example • Consider: • Consider: – 8 bits in an address – Physical memory = 128 bytes – 3 bits for the frame/page number – Physical address space = 8 frames • How many bytes (words) of physical memory? • How many bits in an address? • How many frames are there? • How many bits for page number? • How many bytes is a page? • How many bits for page offset? • How many bits for page offset? • Can a logical address space have only 2 • If a process’ page table is 12 bits, how many pages? How big would the page table be? logical pages does it have? 5
Paging Tradeoffs Page Table Example b=7 • Advantages 0 0 3 Page 0 – no external fragmentation (no compaction) Page 0 A 1 1 7 Page 1 – relocation (now pages, before were processes) 2 • Disadvantages Page Table Process B Page 0 B 3 – internal fragmentation page number page offset Page 1 A p d + consider: 2048 byte pages, 72,766 byte proc 4 – 35 pages + 1086 bytes = 962 bytes m-n=3 n=4 5 + avg: 1/2 page per process Page 0 0 1 + small pages! 6 Page 1 – overhead 1 4 Page 1 B 7 + page table / process (context switch + space) Process A Page Table + lookup (especially if page to disk) Physical Memory Implementation of Page Table Implementation of Page Table • Page table kept in main memory • Page table kept in registers • Page Table Base Register (PTBR) 0 • Fast! 1 4 • Only good when number of frames is small 1 Page 1 Page 0 0 1 • Expensive! 2 Page 0 Page 1 1 4 PTBR 3 Logical Page Table Registers Memory Physical Memory Memory • Page Table Length Disk • Two memory accesses per data/inst access. – Solution? Associative Registers Associative Registers Associative Register Performance • Hit Ratio - percentage of times that a page logical 10-20% mem time address p d number is found in associative registers Effective access time = page frame CPU f d number number hit hit ratio x hit time + miss ratio x miss time • hit time = reg time + memtime physical • miss time = reg time + mem time * 2 address physical • Example: memory associative – 80% hit ratio, reg time = 20 nanosec, mem time registers f = 100 nanosec miss – .80 * 120 + .20 * 220 = 140 nanoseconds page table 6
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