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Overview Objective Types of testing ECE 553: TESTING AND - PDF document

9/1/2014 Overview Objective Types of testing ECE 553: TESTING AND Verification testing TESTABLE DESIGN OF Characterization testing Manufacturing testing DIGITAL SYSTES DIGITAL SYSTES Acceptance testing


  1. 9/1/2014 Overview • Objective • Types of testing ECE 553: TESTING AND – Verification testing TESTABLE DESIGN OF – Characterization testing – Manufacturing testing DIGITAL SYSTES DIGITAL SYSTES – Acceptance testing • Parametric tests: DC and AC • Summary • Test equipment (read the text or manufactures handbooks) – Test specifications and Plan Test Process and Test Equipment – Test data analysis – Automatic test equipment 9/1/2014 2 Types of Testing Objective • Testing principle • Need to understand – Apply inputs and compare “outputs” with the “expected outputs” – Types of tests performed at different stages • Verification testing , or design debug – Automatic Test Equipment (ATE) technology – Verifies correctness of design and of test procedure • Influences what tests are possible – usually requires correction to design • Measurement limitations • Characterization testing • Impact on cost – Used to characterize devices and performed through production life to improve the process – Parametric test • Manufacturing testing – Factory testing of all manufactured chips for parametric faults and for random defects • Acceptance testing ( incoming inspection ) – User (customer) tests purchased parts to ensure quality 9/1/2014 3 9/1/2014 4 Testing Principle Verification Testing • Ferociously expensive • Often a software approach • But, may comprise: – Scanning Electron Microscope tests – Bright-Lite detection of defects – Electron beam testing – Artificial intelligence (expert system) methods – Repeated functional tests 9/1/2014 5 9/1/2014 6 1

  2. 9/1/2014 Schmoo Plot Characterization Test • Use of test structures – Special structures, placed on a wafer at strategic locations, are tested to characterize the process or to determine if testing of chips should proceed • Worst-case test – Choose test that passes/fails chips – Select statistically significant sample of chips – Repeat test for combination of 2+ environmental variables – Plot results in Schmoo plot – Diagnose and correct design errors • Continue throughout production life of chips – Improve design and process to increase yield 9/1/2014 7 9/1/2014 8 Manufacturing Test Burn-in or Stress Test • Process: (Also called production test) – Subject chips to high temperature & over- • Determines if manufactured chip meets specs voltage supply, while running production tests • Must cover high % of modeled faults • Catches: Catches: • Must minimize test time (to control cost) – Infant mortality cases – these are damaged • No fault diagnosis chips that will fail in the first 2 days of • Tests every device on chip operation – causes bad devices to actually fail • Test are functional or at speed of application or before chips are shipped to customers speed guaranteed by supplier – Freak failures – devices having same failure mechanisms as reliable devices 9/1/2014 9 9/1/2014 10 Types of Manufacturing Tests Sub-types of Tests • Wafer sort or probe test – done before wafer is • Parametric – measures electrical properties of scribed and cut into chips pin electronics – delay, voltages, currents, etc. – fast and cheap – Includes test site characterization – specific test devices are checked with specific patterns to devices are checked with specific patterns to • Functional – used to cover very high % of F i l d t hi h % f measure: modeled faults – test every transistor and wire • Gate threshold in digital circuits – long and expensive – the • Polysilicon field threshold focus of this course • Poly sheet resistance, etc. • Packaged device tests 9/1/2014 11 9/1/2014 12 2

  3. 9/1/2014 Two Different Meanings of Incoming Inspection Functional Test • Can be: • ATE and Manufacturing World – any vectors – Similar to production testing applied to cover high % of faults during – More comprehensive than production testing manufacturing test – Tuned to specific systems application Tuned to specific systems application • Automatic Test-Pattern Generation World – A i T P G i W ld • Often done for a random sample of devices testing with verification vectors or vectors generated without structural information , which – Sample size depends on device quality and system determine whether hardware matches its reliability requirements specification – typically have low fault coverage – Avoids putting defective device in a system where (< 70 %) cost of diagnosis exceeds incoming inspection cost 9/1/2014 13 9/1/2014 14 Electrical Parametric Testing Typical tests DC parametric test Probe test (wafer sort) – catches gross defects Electrical Parametric Testing Electrical Parametric Testing Electrical Parametric Testing Electrical Parametric Testing Contact, power, open, short tests C h Functional & layout-related test AC parametric test • Unacceptable voltage/current/delay at pin • Unacceptable device operation limits 9/1/2014 16 Contact Test 1. Set all inputs to 0 V 2. Force current I fb out of pin (expect I fb to be 100 to 250 µ A) DC Parametric Tests DC Parametric Tests DC Parametric Tests DC Parametric Tests 3. Measure pin voltage V pin . Calculate pin resistance R  Contact short ( R = 0 Ω )  No problem  Pin open circuited ( R huge), Ifb and Vpin large 9/1/2014 18 3

  4. 9/1/2014 Power Consumption Test Output Short Current Test 1. 1. Set temperature to worst case, open circuit Make chip output a 1 DUT outputs 2. Short output pin to 0 V in PMU 2. Measure maximum device current drawn 3. Measure short current (but not for long, or from supply I CC at specified voltage f l I t ifi d lt the pin driver burns out) – I CC > 70 mA (fails) – Short current > 40 µ A (ok) – 40 mA < I CC 70 mA (ok) – ≤ Short current 40 µ A (fails) ≤ 9/1/2014 19 9/1/2014 20 Output Drive Current Test Threshold Test 1. For each I/P pin, write logic 0 followed by 1. Apply vector forcing pin to 0 propagation pattern to output. Read output. 2. Simultaneously force V OL voltage and Increase input voltage in 0.1 V steps until measure I OL output value is wrong p g 3. Repeat Step 2 for logic 1 2. Repeat process, but stepping down from logic – I OL < 2.1 mA (fails) 1 by 0.1 V until output value fails ≤ – I OH < -1 mA (fails) – Wrong output when 0 input > 0.8 V (ok) – Wrong output when 0 input 0.8 V (fails) ≥ – Wrong output when 1 input < 2.0 V (ok) – Wrong output when 1 input 2.0 V (fails) 9/1/2014 21 9/1/2014 22 Rise/fall Time Tests AC Parametric Tests AC Parametric Tests AC Parametric Tests AC Parametric Tests 9/1/2014 24 4

  5. 9/1/2014 Set-up and Hold Time Tests Propagation Delay Tests 1. Apply standard output pin load ( RC or RL ) 2. Apply input pulse with specific rise/fall 3. Measure propagation delay from input to p p g y p output  Delay between 5 ns and 40 ns (ok)  Delay outside range (fails) 9/1/2014 25 9/1/2014 26 Summary • Discussed many “types of testing” but alternative ways of defining types of tests exist Automatic Test Equipment Automatic Test Equipment • ATE – need to understand (ATE) (ATE) • Parametric testing – DC and AC • Focus of the course – structure based manufacturing testing of ICs 9/1/2014 27 Test Specifications & Plan Test Programming • Test Specifications: – Functional Characteristics – Type of Device Under Test (DUT) – Physical Constraints – Package, pin numbers, etc. – Environmental Characteristics – supply, temperature, humidity, etc. t t h idit t – Reliability – acceptance quality level (defects/million), failure rate, etc. • Test plan generated from specifications – Type of test equipment to use – Types of tests – Fault coverage requirement 9/1/2014 29 9/1/2014 30 5

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