Overview of the SPS LLRF upgrade Gregoire Hagmann (CERN) Mattia - - PowerPoint PPT Presentation

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Overview of the SPS LLRF upgrade Gregoire Hagmann (CERN) Mattia - - PowerPoint PPT Presentation

Feb 28, 2024 152 likes •432 views

Overview of the SPS LLRF upgrade Gregoire Hagmann (CERN) Mattia Rizzi (CERN) Philippe Baudrenghien (CERN) Javier Serrano (CERN) Javier Galindo (CERN, UPC) Lorenz Schmid (CERN) Wolgang Hofle (CERN) Arthur Spierer (CERN) Gerd Kotzian (CERN)

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SLIDE 1
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SLIDE 2

Overview of the SPS LLRF upgrade

April 2018 Fermilab - slip-stacking 2

Gregoire Hagmann (CERN) Philippe Baudrenghien (CERN) Javier Galindo (CERN, UPC) Wolgang Hofle (CERN) Gerd Kotzian (CERN) Mattia Rizzi (CERN) Javier Serrano (CERN) Lorenz Schmid (CERN) Arthur Spierer (CERN) Tomasz Wlostowski (CERN)

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SLIDE 3

CERN Accelerators Complex

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Fig1 - CERN Accelerators Complex

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SLIDE 4

SPS RF Upgrade 2019-2020 (LS2)

High Lumi LHC Beam requirements

  • Proton [1]:
  • Doubling intensity → 2.5·1011 p+/bunch
  • Ions [2]:
  • 50ns bunch spacing → slip stacking
  • long injection plateau (~40s) → low noise

Main limitations

  • Beam-loading
  • VRF=1MV, ~2MV beam induced
  • Longitudinal instabilities (impedance)

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Fig2 – Ions Slip-stacking [3] 100ns 100ns 50ns Courtesy T. Argyropoulos

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SLIDE 5

SPS RF Upgrade 2019-2020 (LS2)

RF systems :

  • 4x 200MHz cavity → 6 cavities
  • 2x 800MHz cavity

April 2018 Fermilab - slip-stacking

Fig2 - SPS RF systems

LS2

5

Fig3 – SPS Power upgrade

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SLIDE 6

SPS 200MHz Cavities

4 Travelling wave cavities (TWC200) → Splitted into 6 cavities after LS2

(Better compromise with beam loading & Cavity Voltage)

Fermilab - slip-stacking 6

Drift tubes structure

Fig4 – SPS TWC200

April 2018

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SLIDE 7

SPS 800MHz Cavities

2x 800 MHz Travelling wave cavities (Tunnel) 4x 60kW IOT amplifiers per cavity (Surface)

Fermilab - slip-stacking 7

Center freq 800.888MHz Phase advance per cell π/2 Group velocity vg/c +0.035 Cell length 93.5 mm Total length L (37 cells) 3.460 m Series impedance R2 0.647 MΩ/m2

Disc-loaded structure LHC proton beam (2-3·1010 protons/bunch) unstable without 800MHz system

𝑊

"## ≅ 𝑊 %##

10

Fig5 – SPS TWC800

April 2018

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SLIDE 8

SPS 800MHz Cavity Voltage

Fermilab - slip-stacking 8

2 2 2 2 2

sin sin sin 2 2 2 2 8 2 2 1

RF b g g

Z R L R V L I j I v L v v τ τ τ τ τ τ τ τ ω ⎡ ⎤ ⎛ ⎞ ⎛ ⎞ ⎢ ⎥ ⎜ ⎟ ⎜ ⎟ − ⎢ ⎥ = − − ⎜ ⎟ ⎜ ⎟ ⎢ ⎥ ⎜ ⎟ ⎜ ⎟ ⎢ ⎥ ⎝ ⎠ ⎝ ⎠ ⎣ ⎦ ⎛ ⎞ = − Δ ⎜ ⎟ ⎝ ⎠

Zeros at ±3.15MHz 𝜐 : Total phase slip for ultra relativistic p+ V : Cavity voltage Voltage created by the generator Voltage created by the beam

Fig6 – SPS TWC800 Impedance

April 2018

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SLIDE 9

SPS 800MHz Vector Sum

Fermilab - slip-stacking 9

NWA Artefact!

Freq [Hz] Mag [10dB/div]

April 2018

Fig7 – RF Combiner Fig8 – Vector Sum response

2 MHz

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SLIDE 10

SPS LLRF Upgrade

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Fig9 - Current SPS BeamControl Systems

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SLIDE 11

SPS LLRF Upgrade

Current system :

  • NIM, Custom 6U Europa crate, VME
  • Mostly analog
  • Some designs from 1970s
  • Only electronics for 4 cavities at 200MHz
  • (6 cavities installed after LS2)
  • Lack of control
  • No cycle-cycle settings (PPM)
  • No remote control, no built-in diagnostic
  • Very time-consuming setting-up

Upgrade foreseen in LS2 (2019-2020)

  • Beam loading compensation MUST be improved to cope with 2x IBEAM (HiLumi LHC)
  • Bunch per Bunch Beam Phase & Radial position measurement → 5-10GSPS
  • Fixed-frequency acceleration (FFA) for ion acceleration → FPGA
  • Fixed-frequency sampling clock (lower noise) → COTS
  • Deterministic serial link for RF frequency distribution → White-Rabbit
  • Momentum slip-stacking for 50ns ion bunch spacing, → SoC (FPGA+ARM, eg: ZYNQ)

April 2018 Fermilab - slip-stacking 11

Fig10 - Current SPS 200MHz RF feedbacks

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SLIDE 12

SPS LLRF Architecture

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VME MTCA MTCA MTCA

Fig11 – SPS LLRF Architecture

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SLIDE 13

SPS LLRF 200MHz cavity Controller

April 2018 Fermilab - slip-stacking 13 Fclk=125/250 MHz

CERN design SIS8300-KU (Desy/Struck) DS8VM1 (Desy/Struck)

Fig12 – SPS 200MHz Cavity Controller (Direct sampling)

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SLIDE 14

SPS LLRF 200MHz cavity Controller

April 2018 Fermilab - slip-stacking 14 Fclk=125/250 MHz

CERN design SIS8300-KU (Desy/Struck) DS8VM1 (Desy/Struck)

Fig13 – SPS 200MHz Cavity Controller (Direct sampling)

Polar loop:

  • TX noise
  • Open loop phase
  • Gain linearity
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SLIDE 15

SPS LLRF 200MHz cavity Controller

April 2018 Fermilab - slip-stacking 15 Fclk=125/250 MHz

CERN design SIS8300-KU (Desy/Struck) DS8VM1 (Desy/Struck)

Fig14 – SPS 200MHz Cavity Controller (Direct sampling)

RF Feedback

  • IQ feedback
  • Transient beam loading (Frev)
  • Impedance reduction at synchrotron sidebands

(fs, 2·fs)

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SLIDE 16

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Fig15: eRTM for SPS LLRF (Courtesy Mattia Rizzi)

Fixed-frequency sampling

  • Big paradigm change for CERN

synchrotrons

  • Simplify clocking scheme
  • Better noise performance (clock)
  • Higher complexity in signal

processing for bunch synchronous processing White-rabbit support

  • Reconstruction of sampling clock

from White-Rabbit

  • Aim for <130dBc/Hz

(from 100Hz offset range)

  • Scalable system

LLRF Backplane (Desy) compatible

SPS LLRF Clock Generation/Distribution

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SLIDE 17

SPS LLRF Beam control

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Beam based loops

  • B-field reception (White-rabbit)
  • RF freq calculation (FPU)
  • RF freq distribution (White-rabbit)
  • Synchro Loop
  • Phase loop
  • Radial loop
  • Cogging /Rephasing (extr. to LHC)
  • Slip stacking (Ions 50ns)

AMC:

  • FMC Carrier, 2x FMC (HPC)
  • SoC (FPGA+ARM)
  • White-Rabbit (2x)
  • MTCA.4

RTM :

  • 4x SFP+, 3xQSFP+
  • MTCA.4.1 (optional)

Fig16: Beam control in MTCA.4 (Courtesy A. Spierer)

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SLIDE 18

SPS LLRF Beam Phase, Radial Position, Intensity

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Fig17: Beam phase, Radial pos, Intensity (Courtesy G. Kotzian)

  • Signals received from beam position monitors typically cover several GHz
  • SPS RF frequency: 200 MHz → bunch spacing 5 ns
  • Direct sampling of beam signals with fixed sampling clock at >> GSPS
  • Beam synchronous feature extraction in digital
  • Beam instantaneous frequencies received via WR link
  • System clocks are deterministic for every cycle

(“absolute time”, based on WR) Hardware Parameters:

  • Input channels

≥2

  • Sampling rate

≥ 5 GSPS

  • Analog BW

≥ 1 GHz

  • Vertical Res.

≥ 8 bits

  • Data output

200 MSPS

  • Clocks derived from WR (125 MHz)
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SLIDE 19

SPS LLRF MTCA.4.1 Equipment

April 2018 Fermilab - slip-stacking 19

MCH (crate controller) RF backplane

Fig19: MCH (N.A.T. GmbH) Fig20: NAT-LLRF-Backplane (DESY, N.A.T. GmbH) Fig18: MCTA.4.1, 19’’, 9U (Pentair GmbH, N.A.T. GmbH)

MTCA 9U Crate

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SLIDE 20

CERN SPS-LIU Schedule

April 2018 Fermilab - slip-stacking 20 Long Shutdown Long Shutdown Commissioning Commissioning Operation Operation Technical Stop Technical Stop

We are here Beam for physics

  • Q1 2018:

MTCA Cavity controller tests on 200MHz cavity

  • Q2/Q3 2018:

Prototype HW for Beam control (FMC carrier) MTCA HW for Beam phase/Intensity measurement

  • End 2018:

CERN Accelerator complex stop → Long Shutdown 2

  • 2019-2020 :

LLRF Upgrade

  • Q4 2020 :

LLRF commissioning

  • Q1/Q2 2021: Beam commissioning & Run 3

0.55A DC → 1.1A DC (HiLumi LHC)

Fig21: SPS-LIU Master plan

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SLIDE 21

SPS LLRF 200MHz cavity Controller

April 2018 Fermilab - slip-stacking 21 Fclk=125/250 MHz

CERN design SIS8300-KU (Desy/Struck) DS8VM1 (Desy/Struck)

Fig22 – SPS 200MHz Cavity Controller (Direct sampling)

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SLIDE 22

April 2018 Fermilab - slip-stacking 22

SPS LLRF 200MHz cavity Controller

Fig23 – Cavity Controller, FPGA processing

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SLIDE 23

April 2018 Fermilab - slip-stacking 23

SPS LLRF 200MHz cavity Controller

One Turn delay feedback

𝐼*+,- = 𝐻 𝑐# + 𝑐2 3 𝑎56 1 + 𝑏# 3 𝑎56 + 𝑏2 3 𝑎5%6

Fig24 – One Turn Delay feedback with triple comb

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SLIDE 24

April 2018 Fermilab - slip-stacking 24

SPS LLRF 200MHz cavity Controller

MIMO feedback

Fig25 – MIMO RF Feedback (3 cavities)

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SLIDE 25

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AXI4 Full, 512 bits, 125 MHz AXI4 Lite, 32 bits, 62.5 MHz PCIE Gen3 x4 WR Link (SFP) SPI/I2C (AD9510, AD9268, etc). ADC/DAC Raw data DDR Memory Fig26 – SIS8300 Firmware (Courtesy T. Wlostowski)

SPS LLRF 200MHz cavity Controller

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SLIDE 26

SPS LLRF 200MHz cavity Controller

April 2018 Fermilab - slip-stacking 26 Fclk=125/250 MHz

CERN design SIS8300-KU (Desy/Struck) DWC8VM1 (Desy/Struck)

IF processing to be studied (Down-converter)

Fig27 – SPS 200MHz Cavity Controller (Down converter)

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SLIDE 27

References

[1] J. Coupard & al. LHC INJECTOR UPGRADE – Technical Design Report – Volume I: Protons, CERN-ACC-2014-0337, 15.12.2017 [2] J. Coupard & al. LHC INJECTOR UPGRADE – Technical Design Report – Volume II: Ions, CERN-ACC-2016-0041, 01.04.2016 [3] T. Argyropoulos, MOMENTUM SLIP-STACKING OF THE I-LHC BEAM IN THE SPS, talk at LIU-SPS BD WG, CERN, 27.02.2014 [4] G. Hagmann & al., SPS LLRF Upgrade project, LLRF Workshop 2017, Barcelona, Spain, Poster P-9

April 2018 Fermilab - slip-stacking 27