Low Level RF for superB Olivier BOURRION LPSC Grenoble December 1, - - PowerPoint PPT Presentation

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Low Level RF for superB Olivier BOURRION LPSC Grenoble December 1, - - PowerPoint PPT Presentation

LLRF motivation reminder Feedback techniques Loop implementation Summary Low Level RF for superB Olivier BOURRION LPSC Grenoble December 1, 2010 Olivier BOURRION LLRF for superB 1 / 30 LLRF motivation reminder Feedback techniques Loop


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SLIDE 1

LLRF motivation reminder Feedback techniques Loop implementation Summary

Low Level RF for superB

Olivier BOURRION

LPSC Grenoble

December 1, 2010

Olivier BOURRION LLRF for superB 1 / 30

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SLIDE 2

LLRF motivation reminder Feedback techniques Loop implementation Summary

Table of Contents

1

LLRF motivation reminder

2

Feedback techniques Direct RF feedback One turn delay feedback

3

Loop implementation Loop details Hardware plateform A few technical details

4

Summary

Olivier BOURRION LLRF for superB 2 / 30

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SLIDE 3

LLRF motivation reminder Feedback techniques Loop implementation Summary

Table of Contents

1

LLRF motivation reminder

2

Feedback techniques Direct RF feedback One turn delay feedback

3

Loop implementation Loop details Hardware plateform A few technical details

4

Summary

Olivier BOURRION LLRF for superB 3 / 30

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SLIDE 4

LLRF motivation reminder Feedback techniques Loop implementation Summary

Cavity model

IG IB Vc L C R IT I0

Z(s) = R ωr Ql s s2 + ωr Ql s + ω2

r

IG Generator current IB Beam current IT Cavity current (− → IT = − → IG + − → IB ) I0 Loss current in shunt resistance VC Cavity voltage Ql Loaded quality factor High intensity beam → cavity voltage perturbated by IB Objective: maintain constant VC

IG contribution should compensate IB Modulation of IB → modulation IG

Olivier BOURRION LLRF for superB 4 / 30

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SLIDE 5

LLRF motivation reminder Feedback techniques Loop implementation Summary

Cavity tuning / phasor diagram

Vc I0 IG IT IB

fB fZ fL

φL Loading angle φZ Cavity tuning angle φB Stable phase angle (above transition IB points upward) From diagram study: tan φZ = tan φ0 + IB

I0 (tan φ0 sin φB + cos φB)

Maintaining generator current in phase with cavity voltage → tan φZ = IB

I0 cos φB

Cavity tuning angle increase with current Frequency shift due to cavity tuning δf = −fRF Zsh Q I VRF Nc

In LER: 233 kHz In HER: 252 kHz

Values close to ωrev − ωs (227 kHz- 2.65 kHz)

Olivier BOURRION LLRF for superB 5 / 30

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SLIDE 6

LLRF motivation reminder Feedback techniques Loop implementation Summary

Instabilities and cavity impedance

Instabilities growth rates proportionnal to the cavities impedance: τ −1

l

≈ eIBFrf α 2EQs [Re Zc(ωrf + lωrev + ωs) − Re Zc(ωrf − lωrev − ωs)] Applying this to the detunned cavity impedance yields:

100000 200000 300000 400000 500000 600000 700000 800000 900000 4.74e+ 08 4.75e+ 08 4.76e+ 08 4.77e+ 08 4.78e+ 08

Cavity impedance

freq (Hz)

  • 30
  • 20
  • 10

10 20 30 40

  • 10
  • 8
  • 6
  • 4
  • 2

2 4 6 8 10

Growth rate NF

mode growth (ms-1)

mode -1 growth rate is 33 ms-1 (baseline LER)

Comparable to synchrotron frequency (1/τ−1)/ωs ∼ 0.5 Exceed the radiation damping rate (LER damping time =20.3 ms) (1/τ−1)/(1/τd) ∼ 670

Olivier BOURRION LLRF for superB 6 / 30

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SLIDE 7

LLRF motivation reminder Feedback techniques Loop implementation Summary Direct RF feedback One turn delay feedback

Table of Contents

1

LLRF motivation reminder

2

Feedback techniques Direct RF feedback One turn delay feedback

3

Loop implementation Loop details Hardware plateform A few technical details

4

Summary

Olivier BOURRION LLRF for superB 7 / 30

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SLIDE 8

LLRF motivation reminder Feedback techniques Loop implementation Summary Direct RF feedback One turn delay feedback

Direct RF feedback (1/2)

e

Tp

Cavity model Zc

+

Loop delay

G A +

IG IB Vp Vref

Expected impedance reduction Zfbk(ω) = Z(ω) 1 + GAe−jT∆ωZ(ω) In theory the highest gain GA is desired:

Maintain loop stability → Phase Margin is impacted by loop delay Canonical value of PM = π/4 yields GAR ≤ Q ωr π 4T + 2ωr 1 + ωr 4T π = GmaxAR Impedance reduction limited by the loop delay T

Olivier BOURRION LLRF for superB 8 / 30

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SLIDE 9

LLRF motivation reminder Feedback techniques Loop implementation Summary Direct RF feedback One turn delay feedback

Direct RF feedback (2/2)

Plots with loop gain = 1.3 × GmaxAR (flat response) and T=440 ns (PEP2 delay value)

10000 20000 30000 40000 50000 60000 70000 4.74e+ 08 4.75e+ 08 4.76e+ 08 4.77e+ 08 4.78e+ 08

Cavity impedance

freq (Hz) impedance (ohms)

  • 2.0
  • 1.5
  • 1.0
  • 0.5

0.0 0.5 1.0 1.5 2.0

  • 10
  • 8
  • 6
  • 4
  • 2

2 4 6 8 10

Growth rate direct

mode growth (ms-1)

Maximum impedance decreased by a factor of 12.8

  • 1 Mode is damped by a factor of 20

Side effect: other modes growth rates are increased! More impedance reduction is needed

Olivier BOURRION LLRF for superB 9 / 30

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LLRF motivation reminder Feedback techniques Loop implementation Summary Direct RF feedback One turn delay feedback

Delay influence

T=470 ns

10000 20000 30000 40000 50000 60000 70000 80000 4.74e+ 08 4.75e+ 08 4.76e+ 08 4.77e+ 08 4.78e+ 08

Cavity impedance

freq (Hz) impedance (ohms)

  • 2.0
  • 1.5
  • 1.0
  • 0.5

0.0 0.5 1.0 1.5 2.0

  • 10
  • 8
  • 6
  • 4
  • 2

2 4 6 8 10

Growth rate direct

mode growth (ms-1)

T=500 ns

10000 20000 30000 40000 50000 60000 70000 80000 4.74e+ 08 4.75e+ 08 4.76e+ 08 4.77e+ 08 4.78e+ 08

Cavity impedance

freq (Hz) impedance (ohms)

  • 2.0
  • 1.5
  • 1.0
  • 0.5

0.0 0.5 1.0 1.5 2.0

  • 10
  • 8
  • 6
  • 4
  • 2

2 4 6 8 10

Growth rate direct

mode growth (ms-1)

Olivier BOURRION LLRF for superB 10 / 30

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SLIDE 11

LLRF motivation reminder Feedback techniques Loop implementation Summary Direct RF feedback One turn delay feedback

Comb filter feedback principle

e

Tp

Cavity model Zc

+

Loop delay

G A +

IG IB Vp Vref Comb filter Phase equalizer 1 turn delay

Overcome loop delay limitation Correction applied with

  • ne turn delay

Minimize impedance at certain frequencies Attenuation needed at synchrotron sidebands → dual peaked comb filter Hcomb(jw) = G(1 − e−jwTrev ) 1 − 2K cos(2πνs)e−jwTrev + K 2e−j2wTrev Response is modified by the complement to reach one turn delay H(jw) = Hcomb(jw) × e−jw(Trev−Tg )

Olivier BOURRION LLRF for superB 11 / 30

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LLRF motivation reminder Feedback techniques Loop implementation Summary Direct RF feedback One turn delay feedback

Comb filter details

Revolution harmonics

The closest K come to the unity, higher the gain, and narrower the bandwidth

Olivier BOURRION LLRF for superB 12 / 30

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LLRF motivation reminder Feedback techniques Loop implementation Summary Direct RF feedback One turn delay feedback

Comb filter feedback limitations

Out of klystron bandwidth, large dephasing → loop instability Precompensation of the dephasing → phase equalizer Gain margin of 10 dB for loop stability (when φ = π) Gmax ≤ 1 + 2K cos(2πνs) + K 2 6 Max gain on comb loop is function of K

with K=63/64 G=0.655 with K=127/128 G=0.660

Reminder: longitudinal radiation damping rate: 0.0492 ms-1

Olivier BOURRION LLRF for superB 13 / 30

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LLRF motivation reminder Feedback techniques Loop implementation Summary Direct RF feedback One turn delay feedback

Simulations

K=63/64 K=127/128 33 ms-1 → 0.05 ms-1

100000 200000 300000 400000 500000 600000 4.74e+ 08 4.75e+ 08 4.76e+ 08 4.77e+ 08 4.78e+ 08

Cavity impedance

freq (Hz) impedance (ohms)

  • 0.15
  • 0.10
  • 0.05

0.00 0.05 0.10 0.15

  • 10
  • 8
  • 6
  • 4
  • 2

2 4 6 8 10

Growth rate direct+ comb

mode growth (ms-1) 50000 100000 150000 200000 250000 300000 350000 400000 450000 4.74e+ 08 4.75e+ 08 4.76e+ 08 4.77e+ 08 4.78e+ 08 Cavity impedance freq (Hz) impedance (ohms)

  • 0.05
  • 0.04
  • 0.03
  • 0.02
  • 0.01

0.00 0.01 0.02 0.03 0.04 0.05

  • 10
  • 8
  • 6
  • 4
  • 2

2 4 6 8 10

Growth rate direct+ comb

mode growth (ms-1)

Olivier BOURRION LLRF for superB 14 / 30

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SLIDE 15

LLRF motivation reminder Feedback techniques Loop implementation Summary Loop details Hardware plateform A few technical details

Table of Contents

1

LLRF motivation reminder

2

Feedback techniques Direct RF feedback One turn delay feedback

3

Loop implementation Loop details Hardware plateform A few technical details

4

Summary

Olivier BOURRION LLRF for superB 15 / 30

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SLIDE 16

LLRF motivation reminder Feedback techniques Loop implementation Summary Loop details Hardware plateform A few technical details

LLRF feedback overview

Tuner loop GFF Gap voltage loop Klystron loop Hardware platform

delay sensitive setpoints Slow processing fast processing

Olivier BOURRION LLRF for superB 16 / 30

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LLRF motivation reminder Feedback techniques Loop implementation Summary Loop details Hardware plateform A few technical details

Cavity tuning

Tuner loop Minimizing of the phasing between cavity probe signal and cavity forward voltage Setpoint: load offset angle Angle offset loop PEP2 implementation arguments. Since all cavities have the same voltage applied, it may be necessary to: decrease the gap voltage by having non zero angle. Lowers voltage

  • n fragile cavity

compensate eventual misphasing between beam and generator current (relative beam phase due to geometry, waveguide length, ...)

Back to loops overview Olivier BOURRION LLRF for superB 17 / 30

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LLRF motivation reminder Feedback techniques Loop implementation Summary Loop details Hardware plateform A few technical details

Gap feedforward (1/2)

Problem Gap in the ring, is like an amplitude modulation of the beam current Current generator with feedback loop is there to compensate beam current effect on the cavity Empty bunch → cavity voltage is not degraded by beam current, power not extracted by beam, unnecessary power used Need a way to avoid unnecessary modulation of the klystron

Back to loops overview Olivier BOURRION LLRF for superB 18 / 30

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LLRF motivation reminder Feedback techniques Loop implementation Summary Loop details Hardware plateform A few technical details

Gap feedforward (2/2)

Solution

1

Detect periodic gap transients by sampling cavity sum signal over

  • ne turn

2

Adaptative filtering is done by combining previous sampling and station I&Q reference in order to minimize the gap transient effect

3

Correction is applied one turn later Longitudinal feedback input

1

In order to provide more power for kicking lower order mode

2

Cosine and sine of LFB kick is applied to Q & I outputs of the model respectively

Back to loops overview Olivier BOURRION LLRF for superB 19 / 30

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SLIDE 20

LLRF motivation reminder Feedback techniques Loop implementation Summary Loop details Hardware plateform A few technical details

Gap voltage loop

Gap voltage has to be maintained constant Direct RF loop works well to damp transient but the loop gain is small Workaround: use a slow loop that will modify setpoints (station I&Q reference) Minimize error at fundamental frequency between gap voltage and forward voltage with higher gain

Back to loops overview Olivier BOURRION LLRF for superB 20 / 30

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LLRF motivation reminder Feedback techniques Loop implementation Summary Loop details Hardware plateform A few technical details

Klystron loops

Anti saturation loop

tend to maintain a constant drive power by changing HVPS → Keep Klystron out of saturation

Klystron gain loop

Direct RF and comb loop must see a constant klystron gain But previous loop plays with HVPS in order to keep constant drive power This loop hides gain changes due to HVPS changes (like in PEP2) Can be used to linearize klystron response (feedback loop using klystron output power)

Klystron ripple (or phase) loop

Changes in HVPS induces phase shift in the klystron Slow changes due to anti saturation loop could be hidden by a slow loop However HVPS usually display ripples → fast computation needed

Back to loops overview Hardware platform Olivier BOURRION LLRF for superB 21 / 30

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LLRF motivation reminder Feedback techniques Loop implementation Summary Loop details Hardware plateform A few technical details

All digital solution

FPGA

RF modulator Ripple loop DSP

Gap loop/spare DSP

Optical fiber Kick from LFB Dual DAC 12 bit Low latency I Q Station ref (476 MHz)

To local PC

SW

USB2 interface

sysclk LO Cavity probe Band pass ADC 12 bit Low latency sysclk_fast

PLL sysclk_fast Sysclk_slow LO Station ref

Kick duplicate out To next station

Comb/spare dsp monitor dsp interlock µC or dsp

LO2 Monitoring probe Low pass ADC 12 bit 1/8 of octal ADC RF_out 24 channels sysclk_slow

LO2

SDRAMs Temps Voltage arcing Low pass ADC 12 bit slow ADC 24

connector

HV Interface Interlock IF LO Cavity probe Band pass ADC 12 bit Low latency LO Cavity probe Band pass ADC 12 bit Low latency LO Cavity probe Band pass ADC 12 bit Low latency

Revolution counter

Digital Down Conversion Group delay is critical Data in one board Computing power Memories for fault recording and excitation Monitoring DSP, build fast amplitude and phase monitoring signals Interlock interfaces (arcing???)

Olivier BOURRION LLRF for superB 22 / 30

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LLRF motivation reminder Feedback techniques Loop implementation Summary Loop details Hardware plateform A few technical details

FPGA content - focus on latency critical path

Complex mult

I,Q I,Q direct I,Q cav1 adj

+

I/Q det ADC Cav 1

Complex mult

I,Q I,Q direct I,Q cav2 adj

+

I/Q det ADC Cav 2

Complex mult

I,Q I,Q direct I,Q cav3 adj

+

I/Q det ADC Cav 3

Complex mult

I,Q I,Q direct I,Q cav4 adj

+

I/Q det ADC Cav 4

+ + + +

  • PID

Complex mult

I,Q

decimator

I,Q I/Q det ADC klystron

Ripple Corrector DSP

I DAC Q DAC

Internal computing Or Comb DSP interface Low pass + Decimator

I,Q I,Q

Internal computing Or Gap DSP interface

LFB input

Complex mult LFB input processing

1+5 clk (M=2) 1+7 clk (M=3) 2 clk 2 clk 2 clk 4 clk 1 clk

decimator

I-

Serv Group delay sensitive One turn delay for computation Eventual DSP interfaces The sharper the CIC filter, the larger the group delay PID used as lead compensator, negative group delay! PEP2 RFP module had 86 ns of I/O delay, BW=3 MHz (Teytelman) Total duration 17/19 + 12 due to ADC/DAC is 29/31 clock cycles Worst case: at 250 MHz → 31 × 4 ns = 124 ns!

back to delay influence Olivier BOURRION LLRF for superB 23 / 30

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LLRF motivation reminder Feedback techniques Loop implementation Summary Loop details Hardware plateform A few technical details

Digital Down Conversion (DDC) (1/2)

Principle

Low pass CIC filter

sin I Cos Q

From ADC Low pass CIC filter

1 cycle Reduced rate data n cycles

3-5 MHz

476 MHz

3-5 MHz

476 MHz-LO 476 MHz +LO

3-5 MHz LO mixing Analogue Band pass? Group delay! 3-5 MHz

IF= 476 MHz-LO

3-5 MHz

baseband FS-2*IF

3-5 MHz Sampling @ Fs CIC low pass 3-5 MHz

baseband

3-5 MHz

IF Fs-IF

3-5 MHz IQ downmixing @ IF 3-5 MHz

IF

3-5 MHz 3-5 MHz

2*IF Fs-IF FS

3-5 MHz

Bring bandwidth of interest to baseband by multiplying a signal at Intermediate Frequency by a sine and cos at the same IF frequency Benefits:

No dissymmetry in I&Q pathes (path length, encoding, ...) No susceptibility to DC offsets

Focus on latency critical path

Olivier BOURRION LLRF for superB 24 / 30

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LLRF motivation reminder Feedback techniques Loop implementation Summary Loop details Hardware plateform A few technical details

Digital Down Conversion (2/2)

Simplification possible by using Fs = 4 × IF in the limited latency path.

3-5 MHz

2*IF

3-5 MHz

Baseband =0 Hz Fs-2*IF

3-5 MHz

2*IF Fs

3-5 MHz IF=Fs/4 3-5 MHz 3-5 MHz

Baseband = 0Hz

3-5 MHz

Fs =4*IF

Fs/2

Easier to implement, doesn’t need real multipliers and sine/cos table (values 0,1,-1,0) Input should be clean or steeply bandpass filtered → at the cost of group delay!! Mixer quality (IF harmonics!) → existing chips have attenuation of first harmonics <-65 dB

Olivier BOURRION LLRF for superB 25 / 30

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SLIDE 26

LLRF motivation reminder Feedback techniques Loop implementation Summary Loop details Hardware plateform A few technical details

CIC design

Filter equation : H(z) = 1 − z−RD 1 − z−1 M Very simple to implement in FPGA Only additions/substractions Following slides will present two sets of parameters (D=1,R=4, M=2 or M=3). Interesting to note filter selectivity vs group delay.

Olivier BOURRION LLRF for superB 26 / 30

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SLIDE 27

LLRF motivation reminder Feedback techniques Loop implementation Summary Loop details Hardware plateform A few technical details

CIC design

CIC with D= 1 R= 4 M= 2 spectrum and aliases

  • 80
  • 70
  • 60
  • 50
  • 40
  • 30
  • 20
  • 10

10 20 40 60 80 100 120 group delay spectrum and aliases

  • 5

5 10 15 20 40 60 80 100 120

Olivier BOURRION LLRF for superB 27 / 30

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SLIDE 28

LLRF motivation reminder Feedback techniques Loop implementation Summary Loop details Hardware plateform A few technical details

CIC design

CIC with D= 1 R= 4 M= 3 spectrum and aliases

  • 80
  • 70
  • 60
  • 50
  • 40
  • 30
  • 20
  • 10

10 20 40 60 80 100 120 group delay spectrum and aliases

  • 5

5 10 15 20 40 60 80 100 120

Olivier BOURRION LLRF for superB 28 / 30

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SLIDE 29

LLRF motivation reminder Feedback techniques Loop implementation Summary

Table of Contents

1

LLRF motivation reminder

2

Feedback techniques Direct RF feedback One turn delay feedback

3

Loop implementation Loop details Hardware plateform A few technical details

4

Summary

Olivier BOURRION LLRF for superB 29 / 30

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SLIDE 30

LLRF motivation reminder Feedback techniques Loop implementation Summary

Summary

By simulation, the highest growth rate should be 0.05 ms-1, in real life should be a higher, influence of non-linearity (in PEP2, discrepancy factor of 4-5) All feedbacks can be implemented in a digital fashion (FPGA or software for slow loop) → Flexibility and maintenability

Olivier BOURRION LLRF for superB 30 / 30