Lecture 38 Last time: CMOS cascode transconductance amplifier - - PowerPoint PPT Presentation

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Lecture 38 Last time: CMOS cascode transconductance amplifier - - PowerPoint PPT Presentation

EECS 105 Spring 2002 Lecture 38 R. T. Howe Lecture 38 Last time: CMOS cascode transconductance amplifier design example Today : BiCMOS voltage amplifier: example of dissection technique for a complicated circuit


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SLIDE 1
  • R. T. Howe

EECS 105 Spring 2002 Lecture 38

  • Dept. of EECS

University of California at Berkeley

Lecture 38

  • Last time:

– CMOS cascode transconductance amplifier design example

  • Today :

– BiCMOS voltage amplifier: example of “dissection” technique for a complicated circuit

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SLIDE 2
  • R. T. Howe

EECS 105 Spring 2002 Lecture 38

  • Dept. of EECS

University of California at Berkeley

Multi-Stage Voltage Amplifier

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SLIDE 3
  • R. T. Howe

EECS 105 Spring 2002 Lecture 38

  • Dept. of EECS

University of California at Berkeley

Cutting Through the Complexity

Two Approaches:

  • 1. Eliminate “background” transistors to reduce

clutter

  • 2. Identify the “signal path” between the input

and output

slide-4
SLIDE 4
  • R. T. Howe

EECS 105 Spring 2002 Lecture 38

  • Dept. of EECS

University of California at Berkeley

First Approach: Find I & V Sources

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SLIDE 5
  • R. T. Howe

EECS 105 Spring 2002 Lecture 38

  • Dept. of EECS

University of California at Berkeley

What’s Left?

Voltage at base of Q2 is set by totem pole

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SLIDE 6
  • R. T. Howe

EECS 105 Spring 2002 Lecture 38

  • Dept. of EECS

University of California at Berkeley

Second Approach: Find Signal Path

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SLIDE 7
  • R. T. Howe

EECS 105 Spring 2002 Lecture 38

  • Dept. of EECS

University of California at Berkeley

Identifying the Stages

First stage (or two stages): CS/CB cascode Second stage (or two stages): CD/CC voltage buffer Why does this make sense for a voltage amplifier?

slide-8
SLIDE 8
  • R. T. Howe

EECS 105 Spring 2002 Lecture 38

  • Dept. of EECS

University of California at Berkeley

Find Key Two-Port Parameters

Output resistance of cascode:

( ) { }

2 2 2 2 / ,

|| 1 ( ||

S m

  • c

CB CS

  • ut

R r g r r R

π

+ =

( )

6 6 6 1 S m

  • up
  • c

R g r R r + = =

slide-9
SLIDE 9
  • R. T. Howe

EECS 105 Spring 2002 Lecture 38

  • Dept. of EECS

University of California at Berkeley

Two-Port Parameters (Cont.)

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SLIDE 10
  • R. T. Howe

EECS 105 Spring 2002 Lecture 38

  • Dept. of EECS

University of California at Berkeley

Output Resistance and Voltage Gain

Source resistance of the CC stage is the output resistance

  • f the CD stage (small)

4 3 4 , 4 ,

1 1 1 1

m

  • m

m

  • CC

S m CC

  • ut
  • ut

g g g R g R R ≈ + = + = = β β

Open-circuit voltage gain Av (last two stages have nearly unity gain):

( ) ( )

7 6 6 2 1

1 ||

  • m
  • m

v

r g r r g A + − = β