IREAP Nonlinear Effects in Advanced Communications Circuits Excited - - PowerPoint PPT Presentation

IREAP Nonlinear Effects in Advanced Communications Circuits Excited by Pulsed RF

John Rodgers, Todd M. Firestone and V. L. Granatstein Institute for Research in Electronics and Applied Physics University of Maryland College Park, MD 20742

jrodgers@glue.umd.edu

IREAP

Program Goals

• Investigate basic electronic mechanisms that cause

RF-induced upset in communications circuits

• Characterize device-level effects
• Identify how susceptibility depends on:

– RF power, frequency and modulation – Device type, voltage, size, layout, parasitic elements, etc. – Scaling laws: future devices will be smaller, faster, lower voltage

• Develop basis for modeling RF effects

IREAP

Outline

• Overview of basic circuit elements excited by RF
• Characterization of nonlinear and high frequency response
• How upset depends on:

– Input DC bias (Vbias) and supply (Vcc) voltages – RF characteristics (frequency, amplitude and modulation) – Logic family, ESD type and topology, – Chaotic excitation

• High frequency circuit modeling using PSPICE
• Nonlinear effects in wireless communications
• Summary of accomplishments and future directions

IREAP

Logic Families Tested at UMD

Source: “Logic Reference Guide,” Texas Instruments Inc., 2002.

Number in Service

IREAP Examples of Electrostatic Discharge (ESD) Protection Circuits in Advanced Logic

Virtually all integrated circuits have some sort of ESD.

IREAP Consider What High Frequencies See

Inverter Lparasitic ESD Diode Cparasitic C(V,f) RF Pulse ESD Diode C(V,f) Vcc Driver

Bus Line Z

Typical circuit values are resonant at microwave frequencies

IREAP

Input Impedance at Microwave Frequencies: Dependence of Resonance on Input Bias

1 10 100 1000 0.5 1 1.5 2 Frequency [GHz] Impedance [Ohms] 0.1 0.2 0.3 0.4 0.5 Induced Amplitude [V]

Vbias= -0.70 Vbias= -0.60 Vbias= -0.50 Vbias= -0.40 Vbias= 0.0 Vbias= +2.0 Pulse Amplitude

IREAP LVX Family Input Impedance

10 100 0.5 1 1.5 2

Frequency [GHz] Impedance [Ohms]

Vbias= +0.0 Vbias= 0.5 Vbias= +1.0 Vbias= +1.5 Vbias= +2.5

IREAP Rectification of RF by Ground-Clamp ESD Diode

• 0.5

0.5 1 1.5 2 50 100 150 200 Time [ns] Voltage [V]

IREAP Direct Injection RF Test System

Pull-up Resistor RF Source

Bias-T

RF Amplifier

Spectrum Analyzer Oscilloscope

DUT

CMOS Inverter

IN OUT VCC Vbias Load Resistor

Oscilloscope

IREAP

Voltage Induced at Input from Rectification of Microwave Pulse by ESD Diode (Frequency = 1.4 GHz, LVX Resonance)

0.5 1 1.5 2 2.5 3 3.5 25 50 75 100

Time [us] Voltage

RF-Induced Voltage at Input RF Amplitude

IREAP

Drive Characteristic of RF Rectification in ALVC (Frequency = 0.95 GHz, ALVC Resonance)

1 2 3 4 5 0.2 0.4 0.6 0.8

RF Voltage at Input [V] Rectified Voltage at Input [V]

2 4 6

Voltage Transfer [V/V]

Rectified Voltage

• Vrect. / Vrf

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ALVC Response as RF Amplitude Increases

09_rodgers_alvc.avi

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Logic Rise Time Matters: When Input Voltage is Near Switching Threshold, Device is Very Sensitive to RF

• 6
• 4
• 2

2 4 6 50 100 150 200

Time [us] Voltage [V]

2 4 6 8 10 12 V_out V_bias RF

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Input State Matters: Comparison of ALVC Output Voltage with High and Low Input Levels and RF Excitation

• 1

1 2 3 4 5 100 200 300 400

Time (ns) Outout Voltage

Vih Vil

IREAP Input IV Characteristics of ALVC (has both Vcc and ground clamp diodes)

Vlo Vhi

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ESD Device-Type Matters: Comparison of HCT Susceptibility with High and Low Input Levels (HCT grounded gate NMOS clamp)

• 30
• 25
• 20
• 15
• 10
• 5

5 1 2 3 4 5

Frequency (GHz)

Threshold RF Power [dBm] which causes output state change

Bias=0.4V Bias=2.4V

IREAP

ESD Topology Matters: Comparison of rectified pulse amplitudes in devices w/ ESD ground clamp, Vcc clamp, and both (input biased low state)

1 2 3 4 5 0.5 0.75 1 1.25 1.5 1.75 2

Frequency [GHz] Rectified Pulse Amplitude [V]

VHC_gnd only LVC_gnd + Vcc zener HCT_ggNMOS LVX_Vcc only

IREAP CMOS Characteristics Matter: Comparison of

devices with wide and narrow input voltage bands where both MOS transistors are conducting Vin

IREAP

When RF biases both CMOS transistors into conduction, device becomes unstable and noisy. Other nonlinear effects have also been observed (possibly chaotic oscillations).

Tail End of LVX Input and Output Voltages as RF Pulse Terminates

0.5 1 1.5 2 2.5 4 5 6 7 8

Time [microseconds] Voltage Vin Vout

IREAP Operating Voltages Matter: Typically, devices are more

susceptible to RF as Vcc decreases and the switching (threshold) voltage band narrows.

• 40
• 35
• 30
• 25
• 20
• 15

0.5 1 1.5

Vbias (V) Threshold RF Power [dBm] to cause state change

Vcc=5 Vcc=4 Vcc=3

IREAP Modulation Matters: Comparison of CW and Pulsed Excitations at Same Power Level

LVX Upset Threshold

5 10 15 20 25 30 35 40 1 1.2 1.4 1.6 1.8 2 2.2

Frequency [GHz] Injected Power [dBm]

Pulsed RF CW

IREAP Injection of RF Pulse with Chaotic Amplitude

Scope Spectrum Analyzer 30 dB 20 dB Hughes 8537H TWTA Variable Atten. Attenuator 20 dB RF Detector Delay Line DUT= ALVC Bias Tee Vout Vbias

IREAP

Amplitude of TWT Output

0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.5 1 1.5 2 2.5 3 3.5 4

Time [us] Amplitude [det]

IREAP

Attractor Map of TWTA Amplitude

• 0.35
• 0.3
• 0.25
• 0.2
• 0.15
• 0.1
• 0.05
• 0.35
• 0.3
• 0.25
• 0.2
• 0.15
• 0.1
• 0.05

A(t) A(t-7tau/4)

IREAP

Spectrum of RF Pulse from TWT

• 75
• 65
• 55
• 45
• 35
• 25
• 15

1 2 3 4 5 6 7

Frequency [GHz] Spectral Power [dBm]

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Output of ALVC Device w/ “Chaotic” Input

• 3
• 2
• 1

1 2 3 4 5 6 1 2 3 4 5 6

Time [microseconds] Voltage [V]

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High Frequency Spice Modeling

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Spice model includes:

• Package and bonding parasitics
• High frequency characteristics of Vcc bypass

capacitor: inductance, ESR

• ESD diodes: reverse recovery, Cj(V), Rf, etc.
• External parasitics on ground and Vcc buses.

IREAP

Spice simulation of ALVC output voltage with input excited by RF pulse

IREAP

Studies of RF Effects in Wireless Communications and Mixed Signal Systems (e.g. Bluetooth)

RF Amp/ Mixer Synthesized LO Demodulator Baseband Output Power Supply RF Pulse Input

IREAP

Schematic of a “loop-back” test circuit for investigating RF effects in digital communications systems and components

ADC SAW Filter BP Filter LNA LO Mixer In Logic Out DAC RAM LO Mixer SAW Filter BP Filter LNA Probe Probe Probe Probe Probe Probe Probe

Find possible RF entry points, pathways and circuit effects that may upset the system or corrupt data.

IREAP RF Effects on Baseband “Bluetooth” Signal

5 10 15 20 100 200 300 400

Time [arb] RF Detector

• 1
• 0.5

0.5

Baseband Signal [V]

No RF Pulse With RF Pulses

Signal

• 0.5
• 0.25

0.25 0.5 100 200 300 400

Time [arb] Baseband [V]

3rd Harmonic Intermods

IREAP The Effect of Noise on Digital RF Signals

Digital communications signal plus noise or interference: Noisy QAM 64 Constellation

( [ ] ( ))

( ) ( [ ] ( ))

N

j t t t M N

V t V V t V t e

ω φ − + +Φ

= + +

IREAP

Results of 3rd Harmonic Injection (1.129 GHz at IF Stage)

Plot of RMS amplitude of the baseband interference signal vs. RF pulse power.

0.02 0.04 0.06 0.08 0.1

• 60
• 55
• 50
• 45
• 40
• 35
• 30
• 25
• 20

Injection Power [dBm] RMS Baseband Amplitude [V]

Noise Margin for QAM 256

IREAP Summary of Results

• RF pulses are detected by nonlinear circuit elements.
• Susceptibility depends on ESD type and topology, parasitic

resonances, bias and supply voltages.

• Demodulated RF pulses mimics valid logic states and cause

state change.

• Faster, smaller, lower voltage devices are more susceptible

at low power levels and higher frequencies.

• Susceptibility enhanced by parasitic resonant frequencies,

which increase as operating speed increases.

• Other nonlinear effects (bias shift, oscillation, noise)

disrupt data even if output state does not latch.

IREAP Collaborations

• Jaycor/Titan interested in results for model development

– Visit resulted in agreement to share experimental data. – First installment CD sent 10/03 containing test result for most advanced CMOS families. – Second installment will be sent by 12/03 containing general high frequency device characteristics.

• MRC has expressed interest in possible collaboration.
• Philips Semiconductor:

– UMD requested information on Phillips ESD circuits. – The Phillips Engineering Applications chief contacted UMD to arrange a phone meeting to discuss possible collaboration. He expressed extreme interest in the project. – Phillips and UMD will be executing a nondisclosure agreement whereby they will share proprietary design data on ESD. – They recently sent us proprietary SPICE models and an internal handbook

• n modeling high frequency package parasitics.

IREAP Future Work

• Continue expanding the experimental/empirical basis for

modeling high frequency effects in devices (BiCMOS, LinBiCMOS).

• Develop generalized formalisms which account for

parasitic reactance, diode response, high order nonlinearity (charge conservation models).

• Further investigate effects from complex (esp. chirp),

chaotic and ultra-wideband modulation of RF pulses.

• Look at smaller, faster structures (CPU core, RDRAM,

DDR, etc.) to verify scaling laws.

• Investigate RF effects in mixed signal systems (A/D,

demodulators, etc.).