IREAP MURI 2001 Review Experimental Study of EMP Upset Mechanisms - PowerPoint PPT Presentation

IREAP MURI 2001 Review Experimental Study of EMP Upset Mechanisms in Analog and Digital Circuits John Rodgers, T. M. Firestone,V. L. Granatstein, M. Walter Institute for Research in Electronics and Applied Physics University of Maryland College Park, MD 20742 jrodgers@glue.umd.edu

IREAP Outline and Motivation • Out-of-band frequency response in communications circuits – Effect of parasitic elements on network performance – Degradation in filter rejection ratios – EMP propagation on signal path – Need for wideband circuit characterization and verification throughout the communications network (RF and IF path, mixer, A/D, power vias, etc.) • Experimental study of device upset using direct RF injection – Identify RF characteristics that produce bit errors, latch-up – What are the EMP effects at the device level? – Modulation and nonlinear circuit response • Directions to pursue – Experiment – Modeling

IREAP Schematic of a “loop-back” test circuit for investigating RF effects in digital communications systems and components Probe Probe Probe Probe Probe Probe Mixer ADC Probe LNA SAW Filter BP Filter In LO RAM Logic Out Mixer DAC LNA SAW Filter BP Filter LO Find possible RF entry points, pathways and circuit effects that may upset the system or corrupt data.

IREAP Example: 2 GHz RF LNA 20 Gain [dB] 0 -20 0 5 10 15 Frequency [GHz]

IREAP Example: 1 GHz low pass filter 0 -20 Forward Transmission [dB] -40 -60 -80 -100 0 5 10 15 20 25 30 Frequency [GHz]

IREAP 140 MHz IF surface acoustic wave (SAW) filter 0 Forward Transmission [dB] -20 -40 -60 -80 -100 0 5 10 15 20 Frequency [GHz]

IREAP Schematic of direct injection experiment Computer DRAM A B 1 H B 8 U/D Load Amplifier 10 dB RF Coupler Reset Carry out FET Probe ENB Microwave Synthesizer Power Meter Digitizer

IREAP Direct injection test facility

IREAP View of injection coupler and memory modules inside computer

IREAP Memory checking code displaying bit errors

IREAP RAS logic waveform with and without RF injection Row Addressing Pin on DRAM Panasonic 424100 RF applied (1.965 GHz at 26 dBm) 6 • Device no longer latches to Vdd and 5 Vss 4 • RF changes RAS Voltage [V] operating bias point 3 • Susceptibility may involve synergistic 2 effects where RF 1 increases likelihood of interference from 0 internal signals. -1 0 100 200 300 400 500 Time [ns] RAS no RF RAS with RF

IREAP Frequency spectrum of RAS waveform 0.7 0.6 Clock Frequency= 33 MHz 0.5 0.4 Amplitude RF on RF off 0.3 0.2 0.1 0 10 20 30 40 50 60 70 80 90 Frequency [M Hz]

IREAP Results with CW injection Threshold Power to cause Bit Error at RAS pin Signal Generator Power 10 5 Signal Generator Power (dBm) 0 -5 -10 -15 1 1.2 1.4 1.6 1.8 2 Frequency (GHz) CW

IREAP RAS Voltage vs. time with Pulsed RF Injection (f~2 GHz) RAS Pin with injected RF before interupt 1.965 GHz (PW=150 ns, PRI=300 ns, Pin=29.4 dBm) 6 5 RAS Logic Pulse 4 Voltage (V) 3 RF Pulse 2 1 0 -1 0 100 200 300 400 500 Time (ns)

IREAP Comparison of results with CW and pulsed injection Threshold Power to cause Bit Error at RAS pin 40 35 Injected Power [dBm] 30 25 20 15 10 5 0 1 1.2 1.4 1.6 1.8 2 2.2 Frequency [GHz] Pulse Mod 50% DF CW

IREAP Amplitude of demodulated RF signal on RAS vs. frequency Frequency range where 3 upset was observed 2.5 2 AM Level [V] 1.5 1 0.5 0 0 5 10 15 20 Frequency [GHz]

IREAP Transients induced on RAS by RF pulses at frequencies up to 20 GHz 0.4 0.2 RAS Voltage [V] 0 -0.2 -0.4 0 50 100 150 200 Time [ns]

IREAP What mechanisms may be responsible for the observed effects? • Thermal: localized RF energy deposition and rapid heating of active MOS regions • Hot-carriers • Nonlinear circuit elements – MOS diodes acting as RF detectors – Demodulation of RF by parametric capacitances

IREAP Upset threshold power vs. duty factor 0 -10 Threshold Upset Power [dBm] -20 -30 Average Injected Power Peak Injected Power -40 -50 -60 -70 0.001 0.01 0.1 1 10 100 Duty Factor [%] Not a thermal effect

IREAP Physical Cross-section of CMOS showing equivalent circuit elements with nonlinear electrical characteristics NMOS PMOS Gate Gate Oxide Oxide Polysilicon Source Drain Source Polysilicon Drain gate Contact Contact Contact gate Contact n + n + p + p + Field Field n - epi Field Oxide Oxide Oxide R R p well n well p - type substrate layer

IREAP Drive characteristic of demodulated 4.12 GHz pulse 2 1.5 Pulse Amplitude [V] 1 0.5 0 0 0.2 0.4 0.6 0.8 1 Injection Power [W]

IREAP Drive characteristic of 6.0 GHz transient pulse 0.36 0.31 0.26 Pulse Amplitude [V] 0.21 0.16 0.11 0.06 0.01 0 0.2 0.4 0.6 0.8 1 Injection Power [W]

IREAP Conclusions • High frequency response of communications circuits must be considered when analyzing susceptibility to determine probable entry and propagation paths for EMP. • The RF shifts the operating bias with respect to Vdd and Vss into a nonlinear amplification regime, which could lead to instability, oscillation and chaotic behavior. • RF pulses are demodulated by nonlinear MOS elements. The envelop voltage constitutes the interrupting signal. • EMP rise time is a key parameter for inducing interrupt signals over wide bandwidths.

IREAP Future Work • The experimental results give basis for modeling high frequency effects in devices • Continue to characterize device-level upset mechanisms and seek to develop generalized formalisms • Study the effects of complex modulation • Look at smaller, faster structures (CPU, RDRAM, DDR, etc.) and investigate how scaling laws may be applied • Investigated RF effects in mixed signal systems (A/D, demodulators, etc.)