IREAP MURI 2001 Review Experimental Study of EMP Upset Mechanisms - - PowerPoint PPT Presentation

IREAP

MURI 2001 Review Experimental Study of EMP Upset Mechanisms in Analog and Digital Circuits

John Rodgers, T. M. Firestone,V. L. Granatstein, M. Walter Institute for Research in Electronics and Applied Physics University of Maryland College Park, MD 20742

jrodgers@glue.umd.edu

IREAP

Outline and Motivation

• Out-of-band frequency response in communications circuits

– Effect of parasitic elements on network performance – Degradation in filter rejection ratios – EMP propagation on signal path – Need for wideband circuit characterization and verification throughout the communications network (RF and IF path, mixer, A/D, power vias, etc.)

• Experimental study of device upset using direct RF injection

– Identify RF characteristics that produce bit errors, latch-up – What are the EMP effects at the device level? – Modulation and nonlinear circuit response

• Directions to pursue

– Experiment – Modeling

IREAP

Schematic of a “loop-back” test circuit for investigating RF effects in digital communications systems and components

ADC SAW Filter BP Filter LNA LO Mixer In Logic Out DAC RAM LO Mixer SAW Filter BP Filter LNA Probe Probe Probe Probe Probe Probe Probe

Find possible RF entry points, pathways and circuit effects that may upset the system or corrupt data.

IREAP Example: 2 GHz RF LNA

• 20

20 5 10 15

Frequency [GHz] Gain [dB]

IREAP Example: 1 GHz low pass filter

• 100
• 80
• 60
• 40
• 20

5 10 15 20 25 30 Frequency [GHz] Forward Transmission [dB]

IREAP 140 MHz IF surface acoustic wave (SAW) filter

• 100
• 80
• 60
• 40
• 20

5 10 15 20

Frequency [GHz] Forward Transmission [dB]

IREAP

Schematic of direct injection experiment

Microwave Synthesizer RF Coupler Amplifier Computer 10 dB Power Meter

A H U/D Reset B1 B8 Load Carry out ENB

DRAM FET Probe Digitizer

IREAP Direct injection test facility

IREAP View of injection coupler and memory modules inside computer

IREAP Memory checking code displaying bit errors

IREAP RAS logic waveform with and without RF injection

• Device no longer

latches to Vdd and Vss

• RF changes
• perating bias point
• Susceptibility may

involve synergistic effects where RF increases likelihood

• f interference from

internal signals.

Row Addressing Pin on DRAM Panasonic 424100 RF applied (1.965 GHz at 26 dBm)

• 1

1 2 3 4 5 6 100 200 300 400 500 Time [ns] RAS Voltage [V]

RAS no RF RAS with RF

IREAP Frequency spectrum of RAS waveform

0.1 0.2 0.3 0.4 0.5 0.6 0.7 10 20 30 40 50 60 70 80 90

Frequency [M Hz] Amplitude

RF on RF off

Clock Frequency= 33 MHz

IREAP Results with CW injection

Threshold Power to cause Bit Error at RAS pin Signal Generator Power

• 15
• 10
• 5

5 10 1 1.2 1.4 1.6 1.8 2

Frequency (GHz) Signal Generator Power (dBm)

CW

IREAP RAS Voltage vs. time with Pulsed RF Injection (f~2 GHz)

RAS Pin with injected RF before interupt 1.965 GHz (PW=150 ns, PRI=300 ns, Pin=29.4 dBm)

• 1

1 2 3 4 5 6 100 200 300 400 500

Time (ns) Voltage (V)

RF Pulse RAS Logic Pulse

IREAP Comparison of results with CW and pulsed injection

Threshold Power to cause Bit Error at RAS pin

5 10 15 20 25 30 35 40 1 1.2 1.4 1.6 1.8 2 2.2

Frequency [GHz] Injected Power [dBm]

Pulse Mod 50% DF CW

IREAP Amplitude of demodulated RF signal

• n RAS vs. frequency

0.5 1 1.5 2 2.5 3 5 10 15 20 Frequency [GHz] AM Level [V]

Frequency range where upset was observed

IREAP Transients induced on RAS by RF pulses at frequencies up to 20 GHz

• 0.4
• 0.2

0.2 0.4 50 100 150 200 Time [ns] RAS Voltage [V]

IREAP What mechanisms may be responsible for the

• bserved effects?
• Thermal: localized RF energy deposition and rapid heating of

active MOS regions

• Hot-carriers
• Nonlinear circuit elements

– MOS diodes acting as RF detectors – Demodulation of RF by parametric capacitances

IREAP Upset threshold power vs. duty factor

• 70
• 60
• 50
• 40
• 30
• 20
• 10

0.001 0.01 0.1 1 10 100 Duty Factor [%] Threshold Upset Power [dBm] Average Injected Power Peak Injected Power

Not a thermal effect

IREAP Physical Cross-section of CMOS showing equivalent circuit elements with nonlinear electrical characteristics

n well

p- type substrate layer

p well n+ n+ p+ p+ Source Contact Drain Contact Drain Contact Source Contact Polysilicon gate Polysilicon gate Gate Oxide Gate Oxide Field Oxide Field Oxide Field Oxide n- epi R

PMOS NMOS

R

IREAP Drive characteristic of demodulated 4.12 GHz pulse

0.5 1 1.5 2 0.2 0.4 0.6 0.8 1

Injection Power [W] Pulse Amplitude [V]

IREAP Drive characteristic of 6.0 GHz transient pulse

0.01 0.06 0.11 0.16 0.21 0.26 0.31 0.36 0.2 0.4 0.6 0.8 1 Injection Power [W] Pulse Amplitude [V]

IREAP Conclusions

• High frequency response of communications circuits must

be considered when analyzing susceptibility to determine probable entry and propagation paths for EMP.

• The RF shifts the operating bias with respect to Vdd and

Vss into a nonlinear amplification regime, which could lead to instability, oscillation and chaotic behavior.

• RF pulses are demodulated by nonlinear MOS elements.

The envelop voltage constitutes the interrupting signal.

• EMP rise time is a key parameter for inducing interrupt

signals over wide bandwidths.

IREAP Future Work

• The experimental results give basis for modeling high

frequency effects in devices

• Continue to characterize device-level upset mechanisms

and seek to develop generalized formalisms

• Study the effects of complex modulation
• Look at smaller, faster structures (CPU, RDRAM, DDR,

etc.) and investigate how scaling laws may be applied

• Investigated RF effects in mixed signal systems (A/D,

demodulators, etc.)