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Evaluation of IP Communication in FPGA-based Camera Platforms Felix - - PowerPoint PPT Presentation

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich Evaluation of IP Communication in FPGA-based Camera Platforms Felix Lampe, B. Sc. July 24, 2017 Chair of Network Architectures and Services

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Evaluation of IP Communication in FPGA-based Camera Platforms

Felix Lampe, B. Sc.

July 24, 2017 Chair of Network Architectures and Services Department of Informatics Technical University of Munich

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Contents

Problem and Motivation Analysis Approach Evaluation Conclusion

  • F. Lampe

– IP in Camera Platforms 2

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

What kinds of cameras are we talking about?

Figure 1: ARRI ALEXA Plus and RED Epic Dragon [1, 2]

  • Professional digital cameras for cinema and broadcast

productions.

  • ASICs or FPGAs for image processing, CPU for UI etc.
  • F. Lampe

– IP in Camera Platforms 3

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Devices at film sets are highly interconnected

Figure 2: ARRI Alexa with monitors and accessories [3]

  • Applications: monitoring, processing, synchronization, control, . . .
  • Usually Serial Digital Interface (SDI) on copper wires
  • F. Lampe

– IP in Camera Platforms 4

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Problems of SDI Infrastructures

  • Necessary data rates (Gbit/s) for uncompressed video:

HD 4K 8K 30 fps

1.5 6.0 24.0

60 fps

3.0 12.0 48.0

120 fps

6.0 24.0 96.0

  • SDI currently supports up to 12 Gbit/s per link
  • Low flexibility: SDI is unidirectional and circuit switched
  • Results in many point-to-point links
  • F. Lampe

– IP in Camera Platforms 5

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Possible Solution: IP Communication

Research Questions:

  • What are the benefits and requirements of integrating

IP communication into a motion picture camera platform?

  • How can such IP communication be realized in an FPGA-based

camera and what are possible difficulties?

  • F. Lampe

– IP in Camera Platforms 6

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Advantages of IP

  • Data rates up to 100G, promoted by telecommunications industry
  • No restrictions to flows (only fixed stream sizes in SDI)
  • Arbitrary payload contents, not just audio/video/meta in fixed ratio
  • Bidirectional, packet-switched links
  • Easily extensible, cheap, widely used
  • F. Lampe

– IP in Camera Platforms 7

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

SDI over IP (SMPTE 2022)

  • Transition mechanism: wrap SDI in IP
  • High Bit-Rate Media Transport Protocol (HBRMT), RTP

, UDP , IP

  • Overhead of 6.25%, units of 1376 bytes
  • Synchronization via PTP instead of coax cable
  • F. Lampe

– IP in Camera Platforms 8

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Quality of Service

  • Different QoS for different applications
  • E.g., low latency and guaranteed bandwidth for live video
  • DiffServ: simple and efficient, provides enough classes
  • Expedited Forwarding for live video, Best Effort for remote control,

. . .

  • F. Lampe

– IP in Camera Platforms 9

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Designed Architecture for Camera Communication

Multilayer Switch CPU OS Kernel (De-)Packetizer Image Chain MAC MAC MAC PHY PHY PHY SFP+ SFP+ SFP+

Figure 3: Block diagram of the proposed architecture

  • F. Lampe

– IP in Camera Platforms 10

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Prototype

  • Implements part of the proposed architecture
  • Packetizer limited to Ethernet/IP
  • No CPU, configuration via USB
  • Implemented in two steps

Figure 4: The Altera/Intel Arria 10 development kit running the prototype

  • F. Lampe

– IP in Camera Platforms 11

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Early Prototype – Two Variants

FIFO Packetizer Depacketizer MAC PHY SFP+ Generator Monitor Depacketizer Packetizer MAC PHY SFP+

Figure 5: The forwarding variant and the generating variant of the early prototype

  • Forwarding variant for latency measurements
  • Generating variant can measure its own throughput
  • F. Lampe

– IP in Camera Platforms 12

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Early Prototype – Throughput

2 4 6 8 10 12 14 16 64 128 256 384 512 768 1024 1280 1518 Packet Rate (Mp/s) L2 Frame Size (Bytes), excluding Preamble, SFD and IFG eoretical Limit Measured Rate 14.882 8.446 4.529 3.094 2.350 1.586 1.197 0.962 0.813 Figure 6: The throughput achieved by the generating variant

  • F. Lampe

– IP in Camera Platforms 13

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Early Prototype – Latency

10 20 30 40 50 550 560 570 580 590 Mean: 571.7 ns StdDev: 4.2 ns Occurrence (%) Latency (ns) No Background Traffic 10 20 30 40 50 550 560 570 580 590 Mean: 581.6 ns StdDev: 27.7 ns Occurrence (%) Latency (ns) 4500 Mbit/s Background Traffic

Figure 7: The latency of the early prototype

  • F. Lampe

– IP in Camera Platforms 14

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Final Prototype

Multilayer Switch (De-)Packetizer Generator Monitor MAC MAC PHY PHY SFP+ SFP+

Figure 8: The structure of the final prototype (simplified)

  • F. Lampe

– IP in Camera Platforms 15

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Final Prototype – Latency

1 2 3 4 5 6 7 1550 1600 1650 1700 1750 1800 Mean: 1685.3 ns StdDev: 35.2 ns Occurrence (%) Latency (ns) 1000 Mbit/s BG Traffic 1 2 3 4 5 6 7 1550 1600 1650 1700 1750 1800 Mean: 1656.4 ns StdDev: 33.5 ns Occurrence (%) Latency (ns) 4500 Mbit/s BG Traffic

Figure 9: The latencies measured with the final design of the prototype

  • F. Lampe

– IP in Camera Platforms 16

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Final Prototype – Latency (QoS)

1 2 3 4 5 1500 1550 1600 1650 1700 1750 1800 Mean: 1657.6 ns StdDev: 32.2 ns Occurrence (%) Best Effort Latency (ns) 4500 + 4500 Mbit/s BG Traffic 1 2 3 4 5 1500 1550 1600 1650 1700 1750 1800 Mean: 1657.5 ns StdDev: 33.6 ns Occurrence (%) Expedited Forwarding Latency (ns) 4500 + 4500 Mbit/s BG Traffic

Figure 10: The latencies measured with the final design of the prototype

  • F. Lampe

– IP in Camera Platforms 17

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Conclusion

  • Ethernet/IP is suitable for communication
  • Higher flexibility than compression, multi-link SDI, . . .
  • Developed architecture is promising
  • Latency performance needs more accurate evaluation
  • F. Lampe

– IP in Camera Platforms 18

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Thanks for listening! Time for questions

  • F. Lampe

– IP in Camera Platforms 19

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Early Prototype – Latency (Loopback)

20 40 60 80 100 407 408 409 410 411 412 413 414 415 416 417 418 Occurrence (%) Loopback Latency (ns) No Background Traffic 100 Mbit/s Background Traffic 1000 Mbit/s Background Traffic 4500 Mbit/s Background Traffic

Figure 11: The latency of the test environment without the FPGA

  • F. Lampe

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

Final Prototype – Latency (Loopback)

5 10 15 20 200 250 300 350 400 450 500 550 Mean: 327.7 ns StdDev: 32.1 ns Occurrence (%) Loopback Latency (ns) 1000 Mbit/s BG Traffic 0.001 0.01 0.1 1 10 100 200 250 300 350 400 450 500 550 Occurrence (%) Loopback Latency (ns) 1000 Mbit/s BG Traffic

Figure 12: The latency of the test environment without the FPGA

  • F. Lampe

– IP in Camera Platforms 21

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Chair of Network Architectures and Services Department of Informatics Technical University of Munich

References I

[1] S. P . Anderson, “Arri Alexa,” Apr. 2014, accessed June 16, 2017. Licensed under https://creativecommons.org/licenses/by/2.0/legalcode. [Online]. Available: https://www.flickr.com/photos/seanpanderson/14390225393/ [2] V. Hyvönen, “RED Epic Dragon 6k,” Dec. 2013, accessed June 16,

  • 2017. Licensed under https://creativecommons.org/licenses/by-sa/2.0/legalcode.

Brightness reduced. [Online]. Available: https://www.flickr.com/photos/villehoo/ 11216966276/ [3] “ARRI Alexa rig,” Dec. 2013, accessed July 23, 2017. [Online]. Available: https://i.imgur.com/AXPMX.jpg

  • F. Lampe

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