Embedded Processors Overview Design features Design features AMBA - - PowerPoint PPT Presentation

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Embedded Processors Overview Design features Design features AMBA - - PowerPoint PPT Presentation

Advanced Digital IC Design Contents Embedded Processors Embedded Processors Overview Design features Design features AMBA Bus AMBA Bus System Why AMBA Dalia Iurascu AMBA AHB, APB Structure Alejandro Vzquez Bofill


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Dalia Iurascu, Alejandro Vazquez Bofill

Embedded Processors

Advanced Digital IC Design

AMBA Bus

Dalia Iurascu Alejandro Vázquez Bofill

Dalia Iurascu, Alejandro Vazquez Bofill

Lund University

Contents

Embedded Processors Overview Design features Design features AMBA Bus System Why AMBA AMBA AHB, APB Structure AMBA Test Interface

Dalia Iurascu, Alejandro Vazquez Bofill

Conclusions References

What is an Embedded Processor?

“Embedded” into a device, it delivers real-time behavior in power sensitive applications.

Dalia Iurascu, Alejandro Vazquez Bofill

Architecture as: Motorola 68000 (68K), Intel x86, AMD 29000(29K), Intel i960.

Shipment of Embedded Processors

Dalia Iurascu, Alejandro Vazquez Bofill

  • J. Hennessy, “The Future of Systems Research”
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Dalia Iurascu, Alejandro Vazquez Bofill Usage

Consumer electronics Communication Automotive

http://www.eit.lth.se

Dalia Iurascu, Alejandro Vazquez Bofill

W here are the em bedded devices?

Dalia Iurascu, Alejandro Vazquez Bofill

Why is this important?

www.techweekeurope.co.uk/news/

Give products programmability and flexibility

Dalia Iurascu, Alejandro Vazquez Bofill

Eliminate components Potential for future product upgrades(embedded software update)

Characteristics

Application Specific Processors Static Structure Non-homogeneous

Dalia Iurascu, Alejandro Vazquez Bofill

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Dalia Iurascu, Alejandro Vazquez Bofill

Num ber of em bedded processor cores

Dalia Iurascu, Alejandro Vazquez Bofill

Power

Good Embedded Processors

Dalia Iurascu, Alejandro Vazquez Bofill

Good Embedded Processors

Performance Latency Latency Bandwidth (throughput) Cost Area

Dalia Iurascu, Alejandro Vazquez Bofill

Complexity

μP/μC/DSP

μC single chip memory , I/O ports memory , I/O ports CISC processors μP CPU memory , I/O ports to be connected externally RISC

Dalia Iurascu, Alejandro Vazquez Bofill

DSP specialized microprocessor designed for digital signal processing

  • real time
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Dalia Iurascu, Alejandro Vazquez Bofill DSP-advantages

Versatility Reprogrammed for other applications Repeatability Easily duplicated

Dalia Iurascu, Alejandro Vazquez Bofill

Simplicity

Nios II Embedded Processor

Most used processor in the FPGA industry Five-Stage pipelined general-purpose RISC microprocessor Supports both 32-bit and 16-bit architectural

Dalia Iurascu, Alejandro Vazquez Bofill

variants Both utilize a 16-bit instruction format to reduce code footprint and instruction memory bandwidth

Nios II

Configurable l b d h l d d Easily combined with user logic and programmed into a PLD Advanced features, such as custom instructions Simultaneous multi-master Avalon bus

Dalia Iurascu, Alejandro Vazquez Bofill

Powerful processing solution

ARM-ISA

Load-Store RISC Architecture 32 bit Architecture 32 bit Architecture All instructions are predicated 16 Registers R0-R14-general purpose register

Dalia Iurascu, Alejandro Vazquez Bofill

R15-program counter 32 bit instructions

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Dalia Iurascu, Alejandro Vazquez Bofill ARM Embedded Processors

Architectural simplicity Small implementations Very low power consumption

Dalia Iurascu, Alejandro Vazquez Bofill

Cortex M3

High performance 32-bit CPU l h h Develop high performance low-cost platforms RISC processor core Low latency 3

Dalia Iurascu, Alejandro Vazquez Bofill

Low latency 3- stage pipeline Optimal blend of 16/32-bit instructions

AMBA-ARM designed

Advanced Microcontroller Bus Architecture On-Chip communication standard Signal protocol-connect multiple blocks in SOC Signal protocol connect multiple blocks in SOC High-performance bus standard High speed cache interfaces AMBA AHB(Advanced High Performance)

Dalia Iurascu, Alejandro Vazquez Bofill

ASB(Advanced System Bus) APB(Advanced Peripheral Bus)

Why AMBA?

Design for low power consumption Partitioning high and low-bandwidth devices Low costs Low costs Test access Integrate optional on-chip test access methodology Reuses the basic bus infrastructure

Dalia Iurascu, Alejandro Vazquez Bofill

Support of multiple development platforms Easier to port real time kernel software

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Dalia Iurascu, Alejandro Vazquez Bofill ARM AMBA Bus

Dalia Iurascu, Alejandro Vazquez Bofill

www.citeseerx.ist.psu.edu/

AMBA Bus(cont.)

High speed bus(ASB or AHB) for CPU High speed bus(ASB or AHB) for CPU Fast memory and DMA

Dalia Iurascu, Alejandro Vazquez Bofill

Bus for peripherals(APB) Connected via a bridge to the high-speed bus

AHB/APB

AHB High performance APB Low power Pipelined operation Burst transfer Multiple Bus Masters p Latched address and control Simple Interface

Dalia Iurascu, Alejandro Vazquez Bofill

Split transactions Bus width 8,16,32,64,128 bits Suitable for many peripherals

ASB

High performance Pipelined operations Multiple bus masters Burst transfers

Dalia Iurascu, Alejandro Vazquez Bofill

Bus width: 8,16,32 bits

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Dalia Iurascu, Alejandro Vazquez Bofill AMBA AHB Structure

Initiate request to arbiter

Dalia Iurascu, Alejandro Vazquez Bofill

http://www.ijest.info/docs/IJEST10-02-05-105.pdf

AMBA AHB Structure(cont.)

Used with central multiplexer interconnection scheme Bus master drive out the address and control signal Bus master drive out the address and control signal Arbiter Ensures that only one bus master has access to the bus Each bus master can request the bus, the arbiter d id hi h h th hi h t i it d i

Dalia Iurascu, Alejandro Vazquez Bofill

decides which has the highest priority and issues a grant signal accordingly

AMBA AHB Structure(cont.)

Decoder Decode the address of each transfer Select the signals from the slave Select the signals from the slave

  • Master:
  • Initiate read and write operations
  • Provide address and control information
  • Only one bus master use actively the bus at one time

Dalia Iurascu, Alejandro Vazquez Bofill

Slave:

  • Respond to a read/write operation

AMBA AHB Architecture

Dalia Iurascu, Alejandro Vazquez Bofill

http://www.ijest.info/docs/IJEST10-02-05-105.pdf

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Dalia Iurascu, Alejandro Vazquez Bofill APB Components

AHB to APB Bridge Latching of all address, data and control signals Drive data for a write transfer D i d t f

Dalia Iurascu, Alejandro Vazquez Bofill

Drive data for a read transfer

http://polimage.polito.it/~lavagno/esd/IHI0011A_AMBA_SPEC.pdf

APB Slaves Un-Pipelined

APB Components(cont.)

Un Pipelined Zero power interface Write data valid for the whole access

Dalia Iurascu, Alejandro Vazquez Bofill

http://polimage.polito.it/~lavagno/esd/IHI0011A_AMBA_SPEC.pdf

ARM7 Processor

Dalia Iurascu, Alejandro Vazquez Bofill

http://www.cs.umich.edu/~prabal/teaching/eecs373-f10/readings/flynn97amba.pdf

AMBA Test Interface

Dalia Iurascu, Alejandro Vazquez Bofill

Provides access to inputs/outputs of peripheral that are not directly connected to the bus

Courtesy “AMBA 2.0”

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Dalia Iurascu, Alejandro Vazquez Bofill TIC(Test Interface Controller)

Dalia Iurascu, Alejandro Vazquez Bofill

Courtesy “AMBA 2.0”

Convert the external test vector into internal bus transfer

Inputs for Test Interface

TCLK Test clock input signal Must not glitch TREQA

Dalia Iurascu, Alejandro Vazquez Bofill

Test bus request A Request entry into the test mode

Inputs(cont.)

TREQB Test bus request B Type of test vector in the following cycle Type of test vector in the following cycle TACK Gives external indication that test bus has been granted

Dalia Iurascu, Alejandro Vazquez Bofill

TBUS-bidirectional Apply address ,control write vectors

Conclusions

Em bedded processors Widely used and sold Customized for a specific application

Dalia Iurascu, Alejandro Vazquez Bofill

Typically have fewer resources compared with General purpose processors

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Dalia Iurascu, Alejandro Vazquez Bofill Conclusions-AMBA

AMBA Bus Bus-excellent communication medium to connect Bus excellent communication medium to connect several devices Shared communication-bottleneck in the system Technology independent

Dalia Iurascu, Alejandro Vazquez Bofill

Ensures that highly reusable peripheral can be migrated across a diverse range of IC processes

References

[1] S .Cotofana, St.Wong, St. Vassiliadis, “Embedded Processors: Characteristics and Trends” [2] David Flynn ”AMBA :Enabling reusable On Chip Design” [2] David Flynn, AMBA :Enabling reusable On-Chip Design [3] Jörg Henkel, Sri Parameswaran, Newton Cheung, ”Application- Specific Embedded Processors” [4] http://embeddedsystemnews.com

Dalia Iurascu, Alejandro Vazquez Bofill

[5]http://www.eetimes.com/discussion/analystscorner/4025062/Com paring-embedded-processors

References

[7] http://www.ehow.com/facts_6878538_embedded- processor-definition.html [8] www. citeseerx.ist.psu.edu [9] http://www.esacademy.com/assets/faqs/primer/2.htm [10] www.cs.ucr.edu/Yang lec5.ppt

Dalia Iurascu, Alejandro Vazquez Bofill

[11]http://blogs.mentor.com/verificationhorizons/blog/20 11/03/31/part-2-the-2010-wilson-research-group- functional-verification-study

Thank you

Questions?

Dalia Iurascu, Alejandro Vazquez Bofill