Data$Conversion ADC$and$DAC (aka$A/D$&$D/A) 1 Embedded$System - - PDF document

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Data$Conversion ADC$and$DAC (aka$A/D$&$D/A)

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Embedded$System

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Signal$Conversion$System

• Analog+to+Digital

– Conversion+of+Sensor+ Output+to+Binary+Code

• Digital+to+Analog

– Conversion+of+Binary+ Code+to+Analog+Signal

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Digital$to$Analog$Circuit

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D/A$Conversion

• Operation+Converts+an+n?bit+Binary+value and+

Generates+a+Voltage+Aout

• Aout is+Proportional+to+Reference'Voltage'Vref
• Reference'Voltage'is+Absolute+Range
• Resolution,+MRV,+is+Smallest+non?zero+

Voltage

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Absolute$Voltage$Range EXAMPLE:+8?bit+Input+Word+with+Output+ Voltage+Ranging+Between++5V+(max)+to+? 5V+(min)

+5V++++++++++++11111111++++++++++10V 0V 10000000++++++++++5V ?5V++++++++++00000000+++++++++++0V TRUE+ RANGE ABSOLUTE RANGE BINARY WORD

Must%add%an%offset%value

• f%+5%to%Scale%True%Voltages

to%Absolute%Voltage

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Converter$Varieties

• Some+Converters+Utilize+Signed+Binary+while+

Unsigned+Binary+is+Most+Commonly+Used

• Negative+Vmin is+Common+Since+Many+Sensors+

Produce++/? Voltage+Values

– If+Vmin=0,+then+Vmax=Vref

• Many+Different+Internal+Architectures+(circuit+

level)+are+Available

– Each+has+Different+Strengths+and+Weaknesses

• Here+We+Concentrate+only+at+the+System+

Level

– Internal+Circuit+Architectures+Studied+in+Analog+and+ Mixed+Signal+Courses

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Other$Binary$Encodings

NOT+TRUE 2'S+COMPLEMENT

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D/A$Conversion

• Operation+Converts+an+n?bit+Binary+value and+

Generates+a+Voltage+Aout

• Resolution is+Number+of+Possible+Output+

Levels+the+DAC+is+Designed+to+Reproduce+– Usually+stated+as+Number+of+bits,+n

• Aout is+Proportional+to+Reference'Voltage'Vref

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DAC$Parameters$&$Performance

• Maximum+Sampling'Frequency'–

measurement+of+maximum+speed+at+which+ DAC+circuitry+can+operate+and+still+produce+ Correct+Output

– Aliasing can+Occur+if+Sampling+Frequency+is+Too+ Low

• Monotonicity Refers+to+Ability+of+DAC+Output+

to+Move+Only+in+One+Direction+(increasing+or+ decreasing+voltage)

– measure+of+the+amount+a+DAC+output+may+ decrease+before+asserting+the+correct+output

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Analog$to$Digital$Circuit

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ADC$Waveforms

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Sampling$Concepts

• Ideal+Sampling+Modeled+as+Equally+Spaced+Impulse+

Function+Train

• More+Realistic+Model+is+Very+Narrow+Pulses
• Contributes+to+jitter and+phase'noise
• Adds+Harmonics+&+DACs+Usually+use+Low?Pass+Filters+

(Reconstruction' Filter)+to+Reduce+this+Distortion IDEAL LESS+IDEAL

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Sampling$&$Accuracy

Accuracy is+measure+of+Radial+Distance+of+Sample+Point+from+ True+Point+on+Analog+Signal

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Data$Converter$Accuracy/Error

• An+Accurate+Sample Point+Perfectly+Overlays+

Corresponding+Point+on+Analog+Signal

– Perfect+Accuracy+=+Zero+Error

• Roundoff+Error+Contributes+to+Accuracy

– More+Resolution Decreases+Roundoff'Error

• Horizontal+Distance+is+Timing'Error

– Jitter,+Phase'Noise,+Skew,+etc.+Contribute+to+this+Error – Other+Contributors

• Vertical+Distance+is+Amplitude'Error (usually+volt)

– Many+Different+Contributors – Step'Recovery,+Monotinicity and+Other+Contributors

• Noise Sources+are+Random Contributors

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Aliasing

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Undersampling

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Nyquist$Sampling$(ADC)

• Nyquist'Frequency'is+Absolute+

Maximum+Limit

– fNyq is+2X+Highest+Desired+Frequency+Component+in+ Sampled+Signal

• Does+not+Represent+the+Highest+

PRACTICAL+Frequency+Measurable

• In+Practice+Cannot+Expect+ADC+to+

Resolve+any+Frequency+Greater+than+1/5+ to+1/10+of+Sample+Frequency

• Typically+Sample+Signals+about+7?10+

Times+per+Period

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Preventing$Aliasing

• Insert+Low?Pass+Filter+Between+Signal+Source+

and+ADC+(antiEaliasing'filter)

• Low?Pass+Cutoff+Frequency+set+to:
• Practical+Attenuation+Levels+at+Cutoff+are+3?9+

dB+(Gain+=+0.5+(?3+dB)+to+0.125+(?9+dB))

• This+Ensures+no+Signal+Frequency+

Components+Higher+than+Nyquist+Frequency+ are+Sampled+by+the+ADC

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ADC$Step$Recovery

• Measure+of+How+Quickly+ADC+Changes+its+

Output+to+Match+a+Large+Sudden+Change+in+ Analog+Input

– eg+a+signal+with+a+near+"step+function?like"+feature+ requires+very+quick+(low?valued)+step+recovery

• Ideal+ADC

– Large+(infinite)+Output+Word+Size+(high+resolution) – very+fast+(0?delay)+Step+Recovery

• Unfortunately+NO$IDEAL$ADCS$in+Reality

– Resolution+versus+Step+Recovery+is+a+Tradeoff – Continual+R&D+in+ADC+Circuit+Architecture – Always+Taking+Advantage+of+Emerging+Technologies

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ADC$Circuit$Architecture$Tradeoffs

Resolution/Compl exity Ratio Speed Step Recovery BEST Single-slope Integrating Flash Flash Dual-slope Integrating Tracking Successive- Approximation Counter Successive Approximation Single-slope Integrating AND Counter Tracking Single-Slope Integrating AND Counter

• Successive

Approximation

• Dual-slope

Integrating WORSE Flash Dual-slope Integrating Tracking (assumptions+made+here+– not+absolute+– such+as+analog+comparator+complexities)

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DAC$Performance$Measures

• Total'Harmonic'Distortion'(THD)+–

measurement+of+the+amount+of+noise+and/or+ distortion+introduced+into+output+signal+by+the+ DAC

– expressed+as+percentage of+total+power+of+ unwanted+signal+components+versus+total+power+of+ ideal+signal+component

• Dynamic'Range'– Measurement+of+Difference+

Between+Largest+and+Smallest+Signal+DAC+ can+Reproduce

– usually+expressed+in+decibels+(dB) – dB+is+convenient+for+exponentially+varying+values+ since+it+reduces+them+to+a+linear+relationship

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DAC$Performance$Measures

• Jitter – Deviation+from+Precise+Sample+Timing+

Intervals

• Phase'Distortion'– Distortion+Occuring+due+to+

non?linear+Filter+Phase+Response+over+the+ Frequency+Range+of+Interest

• Causes+Dependent+on+Particular+Circuit+

Architecture:

– Clock+Skew+and+Drift – Reconstruction+Filter+Nonlinearaties – Sampling+Circuit+Architecture – Noise+(White,+Flicker,+etc.)

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Resolution$and$MRV

• For+n+bits+Binary

– Resolution+:+2-n

• MRV (Minimum+Representable+

Voltage)

– MRV =+Full+Scale+ Resolution – Example

• Full+Scale+of+10V,+4?bit+

Encoding

• MRV+=+10/16+=+625mV
• Impossible+to+represent+a+

voltage+lower+than+625mV

– To+improve+accuracy of+ conversion,+Increase+n

• Example:+n = 8
• MRV+=+10+/+28 =+39mV

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Example$Problem A+water+tank+has+a+maximum+height+of+40+ feet.++If+a+perfect+sensor+can+measure+the+ water+height,+how+much+resolution+is+ required+for+the+ADC+to+give+values+with+a+ measurement+error+of+no+more+than+1/10+

• f+an+inch?+(Assume+all+other+error+

sources+are+zero)

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Example$Problem$1 1) First+determine+the+number+of+1/10+inch+ steps+in+maximum+value: 2) Compute+Number+of+Bits+Needed+to+ Represent+4800+Steps:

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Example$Problem$2 A+decoded+MP3+audio+stream+is+to+be+ scaled+between++/? 1V+for+input+to+the+final+

• utput+amplifier.+If+the+DAC+outputs+16?bit+

samples,+what+is+the+minimum+(non?zero)+ representable+voltage+(MRV)?+Assume+ perfect+accuracy+? an+ideal+DAC.++This+ means+ideal+jitter+(0),+perfect+step+recovery+ (infinite),+etc.+

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Example$Problem$2 Use+Resolution+Equation,+MRV=Aout when+ value=1 and+Vref is+Full+Scale+Voltage:

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Example$Problem$3 What+is+the+dynamic+range+of+the+DAC+in+ Example+Problem+2?

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Example$Problem$3 What+is+the+dynamic+range+of+the+DAC+in+ Example+Problem+2? This%is%a%BIG%Dynamic%Range!!!

DVD+Audio+Sounds+Better+than+CD+Audio (24?bit+versus+16?bit+– More+Accurate)

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Example$Problem$4 What+is+the+resolution+of+a+DAC+with+a+70+ dB+dynamic+range+and+a+reference+voltage+

• f+5V?

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Example$Problem$4 What+is+the+resolution+of+a+DAC+with+a+70+ dB+dynamic+range+and+a+reference+voltage+

• f+5V?

1) First+find+MRV

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Example$Problem$4 What+is+the+resolution+of+a+DAC+with+a+70+ dB+dynamic+range+and+a+reference+voltage+

• f+5V?

2) Use+Resolution+Equation+to+find+n

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Example$Problem$5 An+8?bit+DAC+outputs+?2.2V+with+Vmax=+5V and+Vmin=-5V.++What+is+the+8?bit+input+value (in+unsigned+binary)?

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Example$Problem$5 An+8?bit+DAC+outputs+?2.2V+with+Vmax=+5V and+Vmin=-5V.++What+is+the+8?bit+input+value (in+unsigned+binary)?

+5V++++11111111++++++++++10V 0V 10000000++++++++++5V ?2.2V+++???????? +2.8V ?5V+++00000000++++++++++++0V Must%add%an%offset%value

• f%+5%to%Scale%True%Voltages

to%Absolute%Voltage

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Example$Problem$5 An+8?bit+DAC+outputs+?2.2V+with+Vmax=+5V and+Vmin=-5V.++What+is+the+8?bit+input+value (in+binary)? 1)Use+the+resolution+equation+(ONE+WAY)

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Example$Problem$5 An+8?bit+DAC+outputs+?2.2V+with+Vmax=+5V and+Vmin=-5V.++What+is+the+8?bit+input+value (in+binary)? 1)Use+proportions+(ANOTHER+WAY)

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Example$Problem$6 An+audio+signal+is+sampled+at+3+times+the+ Nyquist+frequency+and+processed+by+a+16? bit+DAC.++The+resulting+bitstream+is+then+ transmitted+serially.++What+is+the+bandwidth+

• f+the+serial+transmission?

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Example$Problem$6 An+audio+signal+is+sampled+at+3+times+the+ Nyquist+frequency+and+processed+by+a+16? bit+DAC.++The+resulting+bitstream+is+then+ transmitted+serially.++What+is+the+bandwidth+

• f+the+serial+transmission?

1) First+Identify+Frequency+Range+of+ Human+Auditory+System.++This+Varies+ from+Human+to+Human+but+is+Generally+ Considered+to+be+20Hz+to+40kHz.

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Example$Problem$6 An+audio+signal+is+sampled+at+3+times+the+ Nyquist+frequency+and+processed+by+a+16? bit+DAC.++The+resulting+bitstream+is+then+ transmitted+serially.++What+is+the+bandwidth+

• f+the+serial+transmission?

2) Only+Need+to+Worry+about+High+ Frequency+Component+for+our+Problem,+ 40kHz.

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Example$Problem$6 An+audio+signal+is+sampled+at+3+times+the+ Nyquist+frequency+and+processed+by+a+16? bit+DAC.++The+resulting+bitstream+is+then+ transmitted+serially.++What+is+the+bandwidth+

• f+the+serial+transmission?

3) Nyquist+Frequency+is+80kHz+and+ Sampling+Factor+is+3,+so+240+kHz+is+ Sampling+Frequency.

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Example$Problem$6 An+audio+signal+is+sampled+at+3+times+the+ Nyquist+frequency+and+processed+by+a+16? bit+DAC.++The+resulting+bitstream+is+then+ transmitted+serially.++What+is+the+bandwidth+

• f+the+serial+transmission?

4) So+16+bits+are+produced+at+rate+of+ 240kHz.

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Binary$Code$Conversion$Algorithms

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Binary$Code$Conversion$Algorithms

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Binary$Code$Conversion$Algorithms

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Binary$Code$Conversion$Algorithms

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Interpolation$

• The+process+of+

reconstructing+a+signal+ from+its+values+at+ discrete+instants+of+time

– Zero+order+hold+

• r+One+Point

– Linear+

• r+Two+Point

– Band+limited+

• r+Low+pass+Filtering

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Simple$DAC$Circuit

• n?bit+DAC

– n+Latches+hold+Binary+ Number – n+transistor+switch+ Register+network – Voltage+reference+ controls+the+range+of+

• utput

– OP+amp+provides+ summing+function

• Concept:+4?bit+DAC

– 1010B+! Eout+??

• Bit+3+(1000B)

– Eout+=+R/2R+x+Eref

• Bit+1+(0010B)

– Eout+=+R/8R+x+Eref

• Total+(1010B)

– Eout+=+Eref/2+++Eref/8

– Eout:+0+~+(15/16+x+Eref)

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Implementing$Simple$DAC$Circuit

• Usually+Single+Chip
• A+Realistic+Value+of+R+in+

IC+is+5kΩ

– 4+bit+DAC

• 24R+=+80kΩ

– 8+bit+DAC

• 28R+=+1.28MΩ

– 12+bit+DAC

• 212R+=+20.48MΩ
• Large+R+is+hard+to+

implement+in+IC

– Needs+very+large+area

• Hope+to+design+a+DAC+

with+Small,+Equal?Value+ Resistors

– Easier+to+implement+ with+IC+technology

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DAC$based$on$RT2R$ladder$network

• Resistive+Ladder+

Network

• Require+twice+R
• But+small+value

– 5kΩ and+10kΩ

• Example+Problem

– Show+that Eout+=+Eref+x+(bit3/2+++ bit2/4+++bit1/8+++ bit0/16)

2R||2R=R R+R=2R SUMMER

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Analog$Devices$AD558$DAC

• AD558+Configuration

Separate+Analog+and+Digital+ Ground To+reduce+noise